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Predictive dynamic thermal management for multimedia applications
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Source International Conference on Supercomputing archive
Proceedings of the 17th annual international conference on Supercomputing table of contents
San Francisco, CA, USA
SESSION: Power table of contents
Pages: 109 - 120  
Year of Publication: 2003
ISBN:1-58113-733-8
Authors
Jayanth Srinivasan  University of Illinois at Urbana-Champaign
Sarita V. Adve  University of Illinois at Urbana-Champaign
Sponsors
ACM: Association for Computing Machinery
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 8,   Downloads (12 Months): 65,   Citation Count: 34
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ABSTRACT

Dynamic Thermal Management (DTM) techniques have been proposed to save on thermal packaging and cooling costs for general-purpose processors. However, when invoked, these techniques result in a significant performance degradation. This paper concerns performance-effective DTM for multimedia applications. We make two contributions: (1) Current DTM algorithms are reactive in nature. We propose a predictive DTM algorithm targeted at multimedia applications, which allows the efficient use of response mechanisms that have high invocation overhead. We find that for our applications, our predictive algorithm performs significantly better than existing reactive DTM algorithms. (2) We evaluate the effectiveness of different DTM response mechanisms. Specifically, we demonstrate the importance of tailoring DTM response mechanisms to the thermal "hot-spots" on the chip and the current thermal limit, and show that a predictive combination of architecture adaptation and dynamic voltage scaling (DVS) performs the best across a broad range of applications and thermal limits.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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In International Technology Roadmap for Semiconductors, http://public.itrs.net/, 2002.
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J. Deeney. Thermal modeling and measurement of large high power silicon devices with asymmertic power distribution. In International Symposium on Microelectronics, 2002.
 
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S. H. Gunther et al. Managing the impact of increasing microprocessor power consumption. In Intel Technology Journal, 1st Quarter, 2001.
 
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T. R. Halfhill. Transmeta Breaks x86 Low-Power Barrier. Microprocessor Report, February 2000.
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Intel XScale Microarchitecture. http://developer.intel.com/design/intelxscale/benchmarks.htm.
 
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K. Skadron et al. HotSpot: Techniques for Modeling Thermal Effects at the Processor-Architecture Level. In THERMINICS, 2002.

CITED BY  35

Collaborative Colleagues:
Jayanth Srinivasan: colleagues
Sarita V. Adve: colleagues