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Stride prefetching by dynamically inspecting objects
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Source Conference on Programming Language Design and Implementation archive
Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation table of contents
San Diego, California, USA
SESSION: Code optimization II table of contents
Pages: 269 - 277  
Year of Publication: 2003
ISBN:1-58113-662-5
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Authors
Tatsushi Inagaki  IBM Tokyo Research Laboratorym Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan
Tamiya Onodera  IBM Tokyo Research Laboratorym Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan
Hideaki Komatsu  IBM Tokyo Research Laboratorym Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan
Toshio Nakatani  IBM Tokyo Research Laboratorym Shimotsuruma, Yamato-shi, Kanagawa-ken 242-8502, Japan
Sponsors
ACM: Association for Computing Machinery
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 9,   Downloads (12 Months): 78,   Citation Count: 10
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ABSTRACT

Software prefetching is a promising technique to hide cache miss latencies, but it remains challenging to effectively prefetch pointer-based data structures because obtaining the memory address to be prefetched requires pointer dereferences. The recently proposed stride prefetching overcomes this problem, but it only exploits inter-iteration stride patterns and relies on an off-line profiling method.We propose a new algorithm for stride prefetching which is intended for use in a dynamic compiler. We exploit both inter- and intra-iteration stride patterns, which we discover using an ultra-lightweight profiling technique, called object inspection. This is a kind of partial interpretation that only a dynamic compiler can perform. During the compilation of a method, the dynamic compiler gathers the profile information by partially interpreting the method using the actual values of parameters and causing no side effects.We evaluated an implementation of our prefetching algorithm in a production-level Java just-in time compiler. The results show that the algorithm achieved up to an 18.9% and 25.1% speedup in industry-standard benchmarks on the Pentium 4 and the Athlon MP, respectively, while it increased the compilation time by less than 3.0%.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  10

Collaborative Colleagues:
Tatsushi Inagaki: colleagues
Tamiya Onodera: colleagues
Hideaki Komatsu: colleagues
Toshio Nakatani: colleagues