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Taming the IXP network processor
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Source Conference on Programming Language Design and Implementation archive
Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation table of contents
San Diego, California, USA
SESSION: Embedded systems table of contents
Pages: 26 - 37  
Year of Publication: 2003
ISBN:1-58113-662-5
Also published in ...
Authors
Lal George  Network Speed Technologies, Inc
Matthias Blume  Toyota Technological Institute at Chicago
Sponsors
ACM: Association for Computing Machinery
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 3,   Downloads (12 Months): 52,   Citation Count: 10
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ABSTRACT

We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal bank assignment, and spills. The compiler's optimizer employs CPS as its intermediate representation; some of the invariants that this IR guarantees are essential for the formulation of a practical ILP model.Appel and George used a similar ILP-based technique for the IA32 to decide which variables reside in registers but deferred the actual assignment of colors to a later phase. We demonstrate how to carry over their idea to an architecture with many more banks, register aggregates, variables with multiple simultaneous register assignments, and, very importantly, one where bank- and register-assignment cannot be done in isolation from each other. Our approach performs well in practise---without causing an explosion in size or solve time of the generated integer linear programs.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  10


REVIEW

"Robert Ballance : Reviewer"

George and Blume introduce the problems in compiling Nova, a language for network processing, to the IXP1200 network processor. The difficulty is in generating code that uses specialized hardware while meeting both size and speed constraints. The   more...

Collaborative Colleagues:
Lal George: colleagues
Matthias Blume: colleagues