| Architectural selection of A/D converters |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 40th annual Design Automation Conference
table of contents
Anaheim, CA, USA
SESSION: Analog design space exploration
table of contents
Pages: 974 - 977
Year of Publication: 2003
ISBN:1-58113-688-9
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Authors
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Martin Vogels
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Katholieke Universite Leuven, ESAT-MICAS, Leuven, Belgium
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Georges Gielen
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Katholieke Universite Leuven, ESAT-MICAS, Leuven, Belgium
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Downloads (6 Weeks): 4, Downloads (12 Months): 41, Citation Count: 3
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ABSTRACT
A method for the architectural selection of analog to digital (A/D) converters based on a generic figure of merit is described. First a figure of merit for the power consumption is introduced. This figure of merit includes both target specifications and technology data and has five generic parameters. The values of these generic parameters can be estimated by analyzing the different converter structures or by means of a fitting procedure using data from published designs. It is shown that the generic parameters have different values for different types of converters. Therefore the trade-off between speed, resolution, power dissipation and technology parameters depends on the type of converter. It is shown that the calculated figures of merit of the published designs, together with the calculated global trade-off comprise a surface in the (5 dimensional) design space. This surface makes it possible to accurately predict the power consumption and select the best converter solution for a certain target application. This can then serve as a first step in data converter synthesis or as a power estimator during high-level system design exploration.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 3
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Daniel Mueller , Guido Stehr , Helmut Graeb , Ulf Schlichtmann, Deterministic approaches to analog performance space exploration (PSE), Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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