ACM Home Page
Please provide us with feedback. Feedback
Wire length prediction based clustering and its application in placement
Full text PdfPdf (11.03 MB)
Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 40th annual Design Automation Conference table of contents
Anaheim, CA, USA
SESSION: Floorplanning and placement table of contents
Pages: 800 - 805  
Year of Publication: 2003
ISBN:1-58113-688-9
Authors
Bo Hu  Univ. of California, Santa Barbara, CA
Malgorzata Marek-Sadowska  Univ. of California, Santa Barbara, CA
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 8,   Downloads (12 Months): 29,   Citation Count: 15
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/775832.776035
What is a DOI?

ABSTRACT

In this paper we introduce a metric to evaluate proximity of connected elements in a netlist. Compared to connectivity [8] and edge separability [4], our metric is capable of predicting short connections more accurately. We show that the proposed metric can also predict relative wire length in multi-pin nets. We develop a fine-granularity clustering algorithm based on the new metric and embed it into the Fast Placer Implementation (FPI) framework [10]. Experimental results show that the new clustering algorithm produces better global placement results than the net absorption [10] algorithm, connectivity [8], and edge separability [4] based algorithms. With the new clustering algorithm, FPI achieves up to 50% speedup compared to the latest version of Capo8.5 [19], without placement quality losses.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
 
2
A.E. Caldwell, A.B. Kahng, S. Mantik, I.L. Markov and A. Zelikovsky, "On wire length estimations for row-based placement", IEEE Trans. on Computer-Aided Design, pp. 1265--1278, Sep 1999.
3
4
5
 
6
J. Garbers, H. J. Promel, and A. Steger, "Finding clusters in VLSI circuits,", In Proc. Int. Conf. Computer-Aided Design, 1990, pp. 520--523.
 
7
T. Hamada, C.K. Cheng and P.M. Chau, "A wire length estimation technique utilizing neighborhood density equations", IEEE Trans. on Computer-Aided Design, vol. 15. pp. 912--922, August 1996.
 
8
S. Hauck and G. Borriello, "An evaluation of bipartitioning techniques", IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol 16, No. 8, 1997.
 
9
H.T. Heineken and W. Maly, "Standard Cell Interconnect Length Predication from Structural Circuit Attributes", Proc. Custom Integrated Circuits Conference, pp. 167--170, 1996.
10
 
11
 
12
M. Pedram and B.T. Preas, "Interconnection Length Estimation for Optimized Standard Cell Layouts", Proc. ICCAD, pp. 390--393. 1989.
 
13
14
 
15
 
16
 
17
Y.C. Wei and C.K. Cheng, "Ratio cut partitioning for hierarchical designs", IEEE Trans. on Computer-Aided Design, pp. 911-921, 1992.
 
18
IBM-place benchmarks: http://gigascale.org/bookshelf/.
 
19
Latest Capo (version 8.5): http://vlsicad.ucsd.edu/Resources/Software Links/PDtools/

CITED BY  15

Collaborative Colleagues:
Bo Hu: colleagues
Malgorzata Marek-Sadowska: colleagues