Ultimate low cost analog BIST

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Ultimate low cost analog BIST

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 40th annual Design Automation Conference table of contents

Anaheim, CA, USA

SESSION: Novel self-test methods table of contents

Pages: 570 - 573

Year of Publication: 2003

ISBN:1-58113-688-9

Authors

Marcelo Negreiros	Universidade Federal do Rio Grande do Sul - PPGC, Porto Alegre, RS, Brazil
Luigi Carro	Universidade Federal do Rio Grande do Sul - PPGC, Porto Alegre, RS, Brazil
Altamiro Amadeu Susin	Universidade Federal do Rio Grande do Sul - PPGC, Porto Alegre, RS, Brazil

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ACM: Association for Computing Machinery

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ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 19, Citation Count: 3

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abstract references cited by index terms collaborative colleagues

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ABSTRACT

In this work a BIST method for linear analog circuits with very low cost and the smallest possible analog overhead area is presented. The method is suitable to be implemented in the SoC environment, as it allows the reuse of resources already available in the system, and it is essentialy digital. Theoretical background is provided, and experimental results demonstrate the advantages and limits of the proposed approach.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Julius S. Bendat , Allan G. Piersol, Random Data: Analysis and Measurement Procedures, John Wiley & Sons, Inc., New York, NY, 1990
	2	Bozena Kaminska , Karim Arabi , I. Bell , José L. Huertas , B. Kim , Adoración Rueda , Mani Soma , Prashant Goteti, Analog and Mixed-Signal Benchmark Circuits-First Release, Proceedings of the IEEE International Test Conference, p.183-190, November 03-05, 1997
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	4	C. Marzocca , F. Corsi, Mixed-Signal Circuit Classification in a Pseudo-Random Testing Scheme, Journal of Electronic Testing: Theory and Applications, v.18 n.3, p.333-342, June 2002 [doi>10.1023/A:1015091324076]
	5	Negreiros, M., Carro, L., Susin, A. A. "Testing Analog Circuits Using Spectral Analysis", International Mixed-Signal Testing Workshop - IMSTW 2002, pp.429--433.
	6	Marcelo Negreiros , Luigi Carro , Altamiro Amadeu Susin, Ultra Low Cost Analog BIST Using Spectral Analysis, Proceedings of the 21st IEEE VLSI Test Symposium, p.77, April 27-May 01, 2003
	7	Negreiros,M.;Carro,L.;Susin,A.A.;"Low Cost Analog BIST Using Binary Noise", Latin American Test Workshop - LATW2003, Digest of Papers, pp.229--233.
	8	Ohletz, M. J.; "Hybrid built-in self test (HBIST) for mixed ana-logue/digital integrated circuits". Proc. European Test Conf., 1991, pp. 307--316.
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	11	Yervant Zorian , Erik Jan Marinissen, System chip test: how will it impact your design?, Proceedings of the 37th conference on Design automation, p.136-141, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337352]

CITED BY 3

	Antonio Andrade, Jr. , Erika Cota , Marcelo Lubaszewski, Improving mixed-signal SOC testing: a power-aware reuse-based approach with analog BIST, Proceedings of the 17th symposium on Integrated circuits and system design, September 07-11, 2004, Pernambuco, Brazil
	Sounil Biswas , Peng Li , R. D. (Shawn) Blanton , Larry T. Pileggi, Specification Test Compaction for Analog Circuits and MEMS, Proceedings of the conference on Design, Automation and Test in Europe, p.164-169, March 07-11, 2005
	Adão A. S. Júnior , Luigi Carro, Highly Digital, Low-Cost Design of Statistic Signal Acquisition in SoCs, Proceedings of the conference on Design, automation and test in Europe, p.30010, February 16-20, 2004