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ABSTRACT
We introduce a static error analysis technique, based on smart interval methods from affine arithmetic, to help designers translate DSP codes from full-precision floating-point to smaller finite-precision formats. The technique gives results for numerical error estimation comparable to detailed simulation, but achieves speedups of three orders of magnitude by avoiding actual bit-level simulation. We show results for experiments mapping common DSP transform algorithms to implementations using small custom floating point formats.
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Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 15
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Tay-Jyi Lin , Hung-Yueh Lin , Chie-Min Chao , Chih-Wei Liu , Chein-Wei Jen, A compact DSP core with static floating-point unit & its microcode generation, Proceedings of the 14th ACM Great Lakes symposium on VLSI, April 26-28, 2004, Boston, MA, USA
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Dong-U Lee , Altaf Abdul Gaffar , Oskar Mencer , Wayne Luk, MiniBit: bit-width optimization via affine arithmetic, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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Amith Singhee , Claire F. Fang , James D. Ma , Rob A. Rutenbar, Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD tools, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
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J. D. Ma , C. F. Fang , R. A. Rutenbar , Xiaolin Xie , D. S. Boning, Interval-valued statistical modeling of oxide chemical-mechanical polishing, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.141-148, November 06-10, 2005, San Jose, CA
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