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Schedulers as model-based design elements in programmable heterogeneous multiprocessors
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 40th annual Design Automation Conference table of contents
Anaheim, CA, USA
SESSION: Modeling issues in the design of embedded systems table of contents
Pages: 408 - 411  
Year of Publication: 2003
ISBN:1-58113-688-9
Authors
JoAnn M. Paul  Carnegie Mellon University, Pittsburgh, PA
Alex Bobrek  Carnegie Mellon University, Pittsburgh, PA
Jeffrey E. Nelson  Carnegie Mellon University, Pittsburgh, PA
Joshua J. Pieper  Carnegie Mellon University, Pittsburgh, PA
Donald E. Thomas  Carnegie Mellon University, Pittsburgh, PA
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 7,   Downloads (12 Months): 25,   Citation Count: 10
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ABSTRACT

As System On a Chip (SoC) designs become more like Programmable Heterogeneous Multiprocessors (PHMs), the highest levels of design will place emphasis on the custom design of elements that were traditionally associated with systems in the large. We motivate how schedulers that make dynamic, data-dependent decisions at run-time will be key design elements in PHM SoCs. Starting from a fundamental model, the role schedulers play in PHMs is developed. Model-based scheduling is introduced as an approach to designing schedulers that optimize a PHM's performance. Due to the complexity of the PHM design space, convergence on optimal design requires high-level modeling and simulation. In model-based scheduling, high-level models of scheduling decisions result in actual design elements that appear in real systems. Experiments for a simple two-processor PHM that does a mix of image and text compression are included. Results show the effectiveness of model-based scheduling.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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C.L. Seitz. "System Timing." Introduction to VLSI Systems. C. Mead, L. Conway. Reading, MA: Addison-Wesley, 1980.
 
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CITED BY  10

Collaborative Colleagues:
JoAnn M. Paul: colleagues
Alex Bobrek: colleagues
Jeffrey E. Nelson: colleagues
Joshua J. Pieper: colleagues
Donald E. Thomas: colleagues