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On-chip logic minimization
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 40th annual Design Automation Conference table of contents
Anaheim, CA, USA
SESSION: New topics in logic synthesis table of contents
Pages: 334 - 337  
Year of Publication: 2003
ISBN:1-58113-688-9
Authors
Roman Lysecky  University of California, Riverside
Frank Vahid  University of California, Riverside
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 7,   Downloads (12 Months): 27,   Citation Count: 18
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ABSTRACT

While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such as Internet Protocol routing table and network access control list reduction, require logic minimization during the application's runtime, and hence could benefit from minimization executing on-chip alongside the application. On-chip minimization can even enable dynamic hardware/software partitioning. We discuss requirements of on-chip logic minimization, and present our new on-chip logic minimization tool, ROCM. We compare with the well-known Espresso logic minimizer and show that ROCM is 10 times smaller, executes 10-20 times faster, and uses 3 times less data memory, with a mere 2% quality penalty, for the routing table and access control list applications. We show that ROCM solves real-sized problems on an ARM7 embedded processor in just seconds.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Advanced RISC Machines Ltd. ARM7. http://www.arm.com/armtech/ARM7_Thumb/, 2002.
 
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Hayashi, T., T. Miyazaki, High-Speed Table Lookup Engine for IPv6 Longest Prefix Match. Proc. IEEE Globecom, Vol. 2, pp. 1576--1581, 1999.
 
5
 
6
 
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McAuley, A. P. Francis. Fast Router Table Lookup Using CAMs. Proc. Infocom, Vol. 3, pp. 1382--91, 1993.
 
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McCluskey, E. Minimization of Boolean Functions. Bell System Technical Journal, pp. 1417-1444, NY, 1959.
 
9
McGeer, P., J. Sanghavi, A. Sangiovanni-Vincentelli. Espresso-Signature: A New Exact Minimizer for Logic Functions. IEEE Transactions on VLSI, Vol. 1, No. 4, pp. 432--440, 1993.
 
10
Merit Network, Inc. Internet Routing Table Statistics, http://www.merit.edu/ipma/routing_table/, 2002.
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12
Svoboda, A., D.E. White. Advanced Logical Circuit Design Techniques. Garland Press, New York, 1979.
 
13
Triscend Corporation. A7 CSoC Family. http://www.triscend.com, 2003.

CITED BY  18

Collaborative Colleagues:
Roman Lysecky: colleagues
Frank Vahid: colleagues