ACM Home Page
Please provide us with feedback. Feedback
Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing
Full text PdfPdf (246 KB)
Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 40th annual Design Automation Conference table of contents
Anaheim, CA, USA
SESSION: Low-power embedded system design table of contents
Pages: 137 - 142  
Year of Publication: 2003
ISBN:1-58113-688-9
Authors
Anand Ramachandran  The University of Texas at Austin, TX
Margarida F. Jacome  The University of Texas at Austin, TX
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 17,   Citation Count: 4
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/775832.775869
What is a DOI?

ABSTRACT

In this paper we propose a novel special-purpose data memory subsystem, called Xtream-Fit, aimed at achieving high energy-delay efficiency for streaming media applications. A key novelty of Xtream-Fit is that it exposes a single customization parameter, thus enabling a very simple and yet effective design space exploration methodology. A second key contribution of this work is the ability to achieve very high energy-delay efficiency through a synergistic combination of: (1) special purpose memory subsystem components, namely, a Streaming Memory and Scratch-Pad Memory; and (2) a novel task-based execution model that exposes/enhances opportunities for efficient prefetching, and aggressive dynamic energy conservation techniques targeting on-chip and off-chip memory components. Extensive experimental results show that Xtream-Fit reduces energy-delay product by 46% to 83%, as compared to general-purpose memory subsystems enhanced with state of the art Cache Decay and SDRAM power mode control policies.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
2
 
3
 
4
J. Montanaro et al. A 160MHz 32b 0.5W CMOS RISC Microprocessor. In ISSCC Digest of Technical Papers, 1996.
 
5
6
7
8
 
9
 
10
11
 
12
13
14
 
15
 
16
 
17
O. Unsal et al. On Memory Behavior of Scalars in Embedded Multimedia Systems. In WMPI, ISCA, 2001.
 
18
 
19
 
20
 
21
22
23
 
24
V. Milutinovic et al. The Split Temporal/Spatial Cache: Initial Performance Analysis. In SCIzzL, 1996.
25
 
26
W. Tang et al. Fetch Size Adaptation vs. Stream Buffer for Media Benchmarks. In WMSP, MICRO, 2001.
 
27
28
 
29
D. Burger et al. Evaluating Future Microprocessors: The SimpleScalar Tool Set Technical Report, University of Wisconsin, Madison, 1996.
 
30
S. Wilton et al. An Enhanced Access and Cycle Time Model for On-chip Caches. Technical Report, DEC WRL, 1994.
 
31


Collaborative Colleagues:
Anand Ramachandran: colleagues
Margarida F. Jacome: colleagues