ACM Home Page
Please provide us with feedback. Feedback
Master/slave speculative parallelization
Full text Publisher SitePublisher Site PdfPdf (1.31 MB)
Source International Symposium on Microarchitecture archive
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture table of contents
Istanbul, Turkey
SESSION: Multithreading I table of contents
Pages: 85 - 96  
Year of Publication: 2002
ISBN ~ ISSN:1072-4451 , 0-7695-1859-1
Authors
Craig Zilles  University of Illinois at Urbana-Champaign
Gurindar Sohi  University of Wisconsin at Madison
Sponsors
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
: IEEE TC-uArch
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 38,   Citation Count: 28
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

Master/Slave Speculative Parallelization (MSSP) is an execution paradigm for improving the execution rate of sequential programs by parallelizing them speculatively for execution on a multiprocessor. In MSSP, one processor---the master---executes an approximate version of the program to compute selected values that the full program's execution is expected to compute. The master's results are checked by slave processors that execute the original program. This validation is parallelized by cutting the program's execution into tasks. Each slave uses its predicted inputs (as computed by the master) to validate the input predictions of the next task, inductively validating the entire execution.The performance of MSSP is largely determined by the execution rate of the approximate program. Since approximate code has no correctness requirements (in essence it is a software value predictor), it can be optimized more effectively than traditionally generated code. It is free to sacrifice correctness in the uncommon case to maximize performance in the common case.A simulation-based evaluation of an initial MSSP implementation achieves speedups of up to 1.7 (harmonic mean 1.25) on the SPEC2000 integer benchmarks. Performance is currently limited by the effectiveness with which our current automated infrastructure approximates programs, which can likely be improved significantly.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
 
3
V. Bala, E. Duesterwald, and S. Banerjia. Transparent Dynamic Optimization. Technical Report HPL-1999-77, Hewlett Packard Labs, June 1999.
 
4
D. Burger and T. Austin. The SimpleScalar Tool Set, Version 2.0. Technical Report CS-TR-1997-1342, Computer Sciences Department, University of Wisconsin--Madison, 1997.
 
5
B. Calder, P. Feller, and A. Eustace. Value Profiling and Optimization. Journal of lnstruction Level Parallelism, Mar. 1999.
6
 
7
J. Collins, et al. Speculative precomputation: Long-range prefetching of delinquent loads. ISCA-28, July 2001.
 
8
 
9
 
10
J. Fisher. Trace scheduling: a technique for global microcode compaction. IEEE Transactions on Computers, 30(7):478--490, 1981.
11
12
 
13
 
14
 
15
 
16
 
17
 
18
19
20
 
21
J. Steffan, et al. Improving Value Communication for Thread-Level Speculation. HPCA-6, Jan. 2000.
22
 
23
 
24
25

CITED BY  28

Collaborative Colleagues:
Craig Zilles: colleagues
Gurindar Sohi: colleagues