Analog circuit sizing based on formal methods using affine arithmetic

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Analog circuit sizing based on formal methods using affine arithmetic

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International Conference on Computer Aided Design archive
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California

Pages: 486 - 489

Year of Publication: 2002

ISBN ~ ISSN:1092-3152 , 0-7803-7607-2

Authors

Andreas Lemke	University of Hanover, Hannover, Germany
Lars Hedrich	University of Hanover, Hannover, Germany
Erich Barke	University of Hanover, Hannover, Germany

Sponsors

: IEEE Circuits & Systems Society
IEEE-CS\DATC : IEEE Computer Society
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 9, Downloads (12 Months): 44, Citation Count: 7

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ABSTRACT

We present a novel approach to optimization-based variation-tolerant analog circuit sizing. Using formal methods based on affine arithmetic, we calculate guaranteed bounds on the worst-case behavior and deterministically find the global optimum of the sizing problem by means of branch-and-bound optimization. To solve the nonlinear circuit equations with parameter variations, we define a novel affine-arithmetic Newton operator that gives a significant improvement in computational efficiency over an implementation using interval arithmetic. The calculation of guaranteed worst-case bounds and the global optimization are demonstrated by a prototype implementation.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 7

	Claire Fang Fang , Rob A. Rutenbar , Markus Püschel , Tsuhan Chen, Toward efficient static analysis of finite-precision effects in DSP applications via affine arithmetic modeling, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Wei-Shen Wang , Vladik Kreinovich , Michael Orshansky, Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
	Mohamed H. Zaki , Sofiène Tahar , Guy Bois, A practical approach for monitoring analog circuits, Proceedings of the 16th ACM Great Lakes symposium on VLSI, April 30-May 01, 2006, Philadelphia, PA, USA
	Amith Singhee , Claire F. Fang , James D. Ma , Rob A. Rutenbar, Probabilistic interval-valued computation: toward a practical surrogate for statistics inside CAD tools, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
	S. Gupta , B. H. Krogh , R. A. Rutenbar, Towards formal verification of analog designs, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.210-217, November 07-11, 2004
	Claire F. Fang , Rob A. Rutenbar , Tsuhan Chen, Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.275, November 09-13, 2003
	Ch. Grimm , W. Heupke , K. Waldschmidt, Refinement of Mixed-Signal Systems with Affine Arithmetic, Proceedings of the conference on Design, automation and test in Europe, p.10372, February 16-20, 2004