ACM Home Page
Please provide us with feedback. Feedback
Design of pipeline analog-to-digital converters via geometric programming
Full text PdfPdf (185 KB)
Source International Conference on Computer Aided Design archive
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California
Pages: 317 - 324  
Year of Publication: 2002
ISBN ~ ISSN:1092-3152 , 0-7803-7607-2
Author
Maria del Mar Hershenson  Barcelona Design, Inc.
Sponsors
: IEEE Circuits & Systems Society
IEEE-CS\DATC : IEEE Computer Society
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 17,   Downloads (12 Months): 81,   Citation Count: 21
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/774572.774620
What is a DOI?

ABSTRACT

In this paper we present a method for the design of analog-todigital converters (ADCs). This method computes the sizes of the different components (transistors, capacitors, etc.) in a predefined ADC topology so that the design specifications are met in the desired process technology.The method is based on formulating the ADC design constraints such as specifications on power, signal-to-noise ratio (SNR), area, and sampling frequency in special convex form in terms of the component sizes of the ADC and intermediate design variables. More specifically, we cast the problem of sizing the components of the ADC as a geometric program. Therefore, all design constraints are formulated as posynomial inequality or monomial equality constraints. Very efficient numerical algorithms are then used to solve the resulting geometric program and to compute the component sizes of an ADC that meets the desired specifications. The synthesis method is fast, and determines the globally optimal design; in particular the final solution is completely independent of the starting point (which can even be infeasible), and infeasible specifications are unambiguously detected.This paper introduces the concept of hierarchical problem formulation within a geometric programming framework. This modular formulation allows a high re-use of the ADC posynomial model.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
G. Gielen and R. Rutenbar. Computer-aided design of analog and mixed-signal integrated circuits. Proceedings of the IEEE, 88(12):1825--1852, December 2000.
 
3
E. S. Ochotta, R. A. Rutenbar, and L. R. Carley. Synthesis of high-performance analog circuits in ASTRX/OBLX. IEEE Transactions on Computer-Aided Design, 15:273--293, March 1996.
 
4
W. Nye, D. C. Riley, A. Sangiovanni-Vincentelli, and A. L. Tits. DELIGHT.SPICE: An optimization-based system for the design of integrated circuits. IEEE Transactions on Computer-Aided Design, 7:501--518, April 1988.
5
 
6
M. G. R. Degrauwe, O. Nys, E. Dijkstra, J. Rijmenants, S. Bitz, B. L. A. G. Goffart, E. A. Vittoz, S. Cserveny, C. Meixenberger, G. Van Der Stappen, and H. J. Oguey. IDAC: An interactive design tool for analog CMOS circuits. IEEE Journal of Solid-State Circuits, 22:1106--115, December 1987.
 
7
M. G. R. Degrauwe, B. L. A. G. Goffart, C. Meixenberger, M. L. A. Pierre, J. B. Litsios, J. Rijmenants, O. J. A. P. Nys, E. Dijkstra, B. Joss, M. K. C. Meyvaert, T. R. Schwarz, and M. D. Pardoen. Towards an analog system design environment. IEEE Journal of Solid-State Circuits, 24:1587--1597, December 1989.
 
8
R. Harjani, R. A. Rutenbar, and L. R. Carley. OASYS: A framework for analog circuit synthesis. IEEE Transactions on Computer-Aided Design, 8:1247--1265, December 1989.
 
9
Z. Ning, T. Mouthaan, and H. Wallinga. SEAS: A simulated evolution approach for analog circuit synthesis. In Proceedings IEEE Custom Integrated Circuits Conference, pages 5.2.1--5.2.4, 1991.
 
10
H. Y. Koh, C. H. Séquin, and P. R. Gray. OPASYN: A compiler for CMOS operational amplifiers. IEEE Transactions on Computer-Aided Design, 9:113--125, February 1990.
 
11
G. G. E. Gielen, H. C. C. Walscharts, and W. M. C. Sansen. Analog circuit design optimization based on symbolic simulation and simulated annealing. IEEE Journal of Solid-State Circuits, 25:707--713, June 1990.
12
13
 
14
F. Medeiro, B. Pérez-Verdú, A. Rodríguez-Vázquez, and J. L. Huertas. Towards an analog system design environment. IEEE Journal of Solid-State Circuits, 30:762--772, July 1995.
 
15
The Mathworks. Matlab 6.1. http://www.mathworks.com/products/matlab/.
 
16
R. J. Duffin, E. L. Peterson, and C. Zener. Geometric Programming --- Theory and Applications. Wiley, 1967.
 
17
 
18
K. O. Kortanek. Geometric programming tutorial. Technical report, INFORMS, San Diego, CA, May 1997.
 
19
 
20
B. Wooley. EE315 course notes. Stanford University, CA, April 2001.
 
21
J. M. Ingino. Continuous calibration for high-accuracy A/D conversion. PhD thesis, Stanford University, March 1999.
 
22
K. Nagaraj. High-speed pipeline A/D converters. Notes for MEAD Microelectronics course on high-speed data converters, November 2001.
 
23
B. Razavi. Principles of Data Conversion. IEEE, Press, Piscataway, 1994.
 
24
 
25
D. W. Cline. Noise, speed and power tradeoffs in pipelined Analog to Digital Converters. PhD thesis, University of California, Berkeley, May 1998.

CITED BY  21

Collaborative Colleagues:
Maria del Mar Hershenson: colleagues