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Specifying and verifying imprecise sequential datapaths by Arithmetic Transforms
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Source International Conference on Computer Aided Design archive
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California
Pages: 128 - 131  
Year of Publication: 2002
ISBN ~ ISSN:1092-3152 , 0-7803-7607-2
Authors
Katarzyna Radecka  Concordia University, Montreal, Quebec, Canada
Zeljko Zilic  McGill University, Montreal, Quebec, Canada
Sponsors
: IEEE Circuits & Systems Society
IEEE-CS\DATC : IEEE Computer Society
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 4,   Downloads (12 Months): 9,   Citation Count: 1
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ABSTRACT

We address verification of imprecise datapath circuits with sequential elements. Using Arithmetic Transform (AT) and its extensions, we verify the sequential datapath circuits with finite precision. An efficient formulation of the precision verification is presented as a polynomial maximization search over Boolean inputs. Using a branch-and-bound search for the precision error and the block-level composition of ATs, we verify the approximated, rounded and truncated pipelined datapaths.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Synopsys Inc, "Co-centric Fixed Point Designer Datasheet", 2002.
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Collaborative Colleagues:
Katarzyna Radecka: colleagues
Zeljko Zilic: colleagues