Combining wire swapping and spacing for low-power deep-submicron buses

ABSTRACT

We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation.The method is based on the combined application of two techniques. First, selective wire swapping is applied in such a way that bus wires with high coupling activity are kept far away from each other. Then, the slack available in the floorplanning for the routing of the bus wire is exploited to realize a bus with non-uniform inter-wire spacing. Both swapping and placement are driven by the switching data obtained from the analysis of typical address bus traces, and can be successfully applied to any address bus.Results on a set of profiled address streams show the effectiveness of the proposed approach.

REFERENCES

• 1: Paul P. Sotiriadis , Anantha Chandrakasan, Bus energy minimization by transition pattern coding (TPC) in deep sub-micron technologies, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
• 2: Jörg Henkel , Haris Lekatsas, A$^{\mbox{\huge\bf 2}}$BC: adaptive address bus coding for low power deep sub-micron designs, Proceedings of the 38th conference on Design automation, p.744-749, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.379058]
• 3: Ki Wook Kim , Kwang Hyun Baek , Naresh Shanbhag , C. L. Liu , Sung Mo Kang, Coupling-driven signal encoding scheme for low-power interface design, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
• 4: Bret Victor , Kurt Keutzer, Bus encoding to prevent crosstalk delay, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
• 5: Luca Macchiarulo , Enrico Macii , Massimo Poncino, Low-energy for deep-submicron address buses, Proceedings of the 2001 international symposium on Low power electronics and design, p.176-181, August 2001, Huntington Beach, California, United States [doi>10.1145/383082.383127]
• 6: Youngsoo Shin , Takayasu Sakurai, Coupling-driven bus design for low-power application-specific systems, Proceedings of the 38th conference on Design automation, p.750-753, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.379059]
• 7: Sunil P. Khatri , Amit Mehrotra , Robert K. Brayton , Ralf H. J. M. Otten , Alberto Sangiovanni-Vincentelli, A novel VLSI layout fabric for deep sub-micron applications, Proceedings of the 36th ACM/IEEE conference on Design automation, p.491-496, June 21-25, 1999, New Orleans, Louisiana, United States [doi>10.1145/309847.309985]
• 8: L. Macchiarulo , E. Macii , M. Poncino, Wire Placement for Crosstalk Energy Minimization in Address Buses, Proceedings of the conference on Design, automation and test in Europe, p.158, March 04-08, 2002
• 9: K. Nahors, J. White, "FastCap: a Multi-pole Accelerated 3-D Capacitance Extraction Program", IEEE Transactions on CAD, 10(11), pp. 1447--1459, Nov. 1991.

INDEX TERMS

Primary Classification:
  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING

Additional Classification:
  B. Hardware
  B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS
      B.4.0 General

  C. Computer Systems Organization
  C.3 SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS

General Terms:
Algorithms, Design

Keywords:
bus encoding, crosstalk, low-power design, physical design