K9: a simulator of distributed-memory parallel processors

ABSTRACT

K9 is a software package for the simulation and performance evaluation of distributed-memory parallel processors (DMPPs). It is written in C++ and runs on Sequent Symmetry and SUN-3. K9 provides the user with four building-blocks (processor cells, communication channels, multi-port shared-memories, and I/O processors), and one abstraction mechanism (the DMPP interconnection topology). Application code for K9 can be written in C++ or C. When timing analysis is turned on, the simulation runs between 10 and 20 times slower than if comparable code were executed by the host. When timing analysis is turned off, the simulation proceeds as fast as comparable code running on the host. K9's fast execution allows the simulation of large application programs. Finally, a graphical interface visualizes—with animation—different parameters of the DMPP architecture (hot spots phenomena, load-balancing problems, and so on).

REFERENCES

• 1: G.M. Birtwhistle , O.J. Dahl , B. Myhrhaug , K. Nygaard, Simula Begin, Chartwell-Bratt Ltd, 1979
• 2: B. Stroustrup. A Set of C-h4- Classes.for Co-Routlne Style Programming. Technical Report 90, AT&T Bell Laboratories, Murray Hill, Jew Jersey, 1984.
• 3: P. Beadle. K9 User Manual. Technical Report 88/20, Integrated Systems Laboratory - Swiss Federal Institute of Technology Zurich, December 1988.
• 4: Mahadev Satyanarayanan, Modelling storage systems, University Microfilms International (UMI), Ann Arbor, MI, 1986
• 5: David Notkin , Lawrence Snyder , David Socha , Mary L. Bailey , Bruce Forstall , Kevin Gates , Ray Greenlaw , Willian G. Griswold , Thomas J. Holman , Richard Korry , Gemini Lasswell , Robert Mitchell , Philip A. Nelson, Experiences with poker, Proceedings of the ACM/SIGPLAN conference on Parallel programming: experience with applications, languages and systems, p.10-20, July 19-21, 1988, New Haven, Connecticut, United States
• 6: L. Snyder.Parallel programming and the Poker programming environment. IEEE Computer, 17(7), July 1984.
• 7: A. Zobel. Experimental analysis of systolic algorithms. 1987. School of Computer Science, Carnegie Mellon University.
• 8: T. H. Dunigan. A Portable Hypercube Simulator. Technical Report ORNL/TM-10410, Oak Fticlge National Laboratory, July 1987.
• 9: M. Annaratone , E. Arnould , T. Gross , H. T. Kung , M. Lam, The warp computer: Architecture, implementation, and performance, IEEE Transactions on Computers, v.36 n.12, p.1523-1538, Dec. 1987 [doi>10.1109/TC.1987.5009502]
• 10: S. Borkar , R. Cohn , G. Cox , S. Gleason , T. Gross, Warp: an integrated solution of high-speed parallel computing, Proceedings of the 1988 ACM/IEEE conference on Supercomputing, p.330-339, November 12-17, 1988, Orlando, Florida, United States
• 11: Intel Scientific Computers. iPSC./2. Technical Report, Intel Scientific Computers, 1988.
• 12: The MEIKO Computing Surface. 1988. Meiko Inc., USA.
• 13: Thomas Gross , Monica S. Lam, Compilation for a high-performance systolic array, Proceedings of the 1986 SIGPLAN symposium on Compiler construction, p.27-38, June 25-27, 1986, Palo Alto, California, United States
• 14: Mark A. Linton , John M. Vissides , Paul R. Calder, Composing User Interfaces with InterViews, Computer, v.22 n.2, p.8-22, February 1989 [doi>10.1109/2.19829]
• 15: D. Pountain, The X window system, BYTE, v.14 n.1, p.353-360, January 1989
• 16: P. Beadle, C. Poinmerell, and M. Annaratone. K9: A Simulator of Distributed-memory Parallel Processors. Technical Report 89/10, Integrated Systems Laboratory - Swiss Federal Institute of Technology Zurich, 1989.
• 17: Peter Sonneveld, CGS, a fast Lanczos-type solver for nonsymmetric linear systems, SIAM Journal on Scientific and Statistical Computing, v.10 n.1, p.36-52, January 1989 [doi>10.1137/0910004]
• 18: P. Sadayappan , F. Ercal, Nearest-neighbor mapping of finite element graphs onto processor meshes, IEEE Transactions on Computers, v.36 n.12, p.1408-1424, Dec. 1987 [doi>10.1109/TC.1987.5009494]
• 19: R. E. Bank et al. Iterative methods for semiconductor device simulation. In K. Truhlar, editor, Proceediugs o} the Workshop on Practical lterative Methods for Large-Scale Coml~utations, Minnesota Supercomputer Institute, October 1988.
• 20: M. Annaratone , C. Pommerell , R. Rühl, Interprocessor communication speed and performance in distributed-memory parallel processors, Proceedings of the 16th annual international symposium on Computer architecture, p.315-324, April 1989, Jerusalem, Israel

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.2 Multiple Data Stream Architectures (Multiprocessors)
          Subjects: Parallel processors**

Additional Classification:
  C. Computer Systems Organization

  D. Software
  D.4 OPERATING SYSTEMS
      D.4.2 Storage Management
          Subjects: Distributed memories

  I. Computing Methodologies
  I.6 SIMULATION AND MODELING

General Terms:
Algorithms, Design, Performance