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A parallel pipelined data flow coprocessor
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Source ACM Annual Computer Science Conference archive
Proceedings of the 17th conference on ACM Annual Computer Science Conference table of contents
Louisville, Kentucky
Pages: 173 - 179  
Year of Publication: 1989
ISBN:0-89791-299-3
Authors
J. T. Canning  Department of Computer Science, University of Lowell
R. Miner  Center for Produ ctivity Enhancement, University of Lowell
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 1,   Downloads (12 Months): 18,   Citation Count: 3
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ABSTRACT

A parallel pipelined data flow coprocessor has been developed for the 68000 based Commodore Amiga workstation. The coprocessor, based on Nippon Electric Corporation's &mgr;PD7281 Image Pipelined Processor (ImPP), was designed as an algorithm processor for numerically intensive applications such as image processing, image synthesis, and numerical analysis. The coprocessor can accomodate up to seven of the 5-MIPS ImPP's providing over 30 MIPS of processing power to dedicated tasks. The ImPP's act as true coprocessor's providing a multi-processor arrangement consisting of the 68000 and the coprocessor's parallel pipeline. The workstation and parallel processors share all system resources including memory and peripherals. The coprocessor has its own DMA capabilities for transferring program code and data between the workstation and the pipeline. The coprocessor is completely programmable via a development environment running native on the Amiga, including an assembler, a simulator, and a runtime library. Additional programming tools are also being developed.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

Gurd 85
 
Jeff 85
T. Jeffery, "The uPD7281 Processor," Byte, November, 1985, pp 237-246
 
McGr 85
J. McGraw et al., SISAL: Streams and Iteration in a Single-Assignment Language: Reference Manual, Ver. 1.2, Manual M-146, Rev. 1, Lawrence Livermore National Laboratory, Livermore, Calif., 1985
 
Mine 87
R. Miner et al., "Parallel DataFlow Coprocessor," University of Lowell CPE Technical Report, March 1987, WP 87-1
 
Olde 88
Veen 86
 
Yuba 87