|
ABSTRACT
ASIC microprocessors are becoming an important technology for the control of complex (“embedded”) systems. The advantage of such microprocessors is that they can be tailored to the application. This tailoring is quite non-intuitive and optimization is a complex process. Tools such as the Architect's Workbench (AWB) have been developed to assist in this optimization. An example study shows a more than two to one advantage of such assisted analysis.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
Donald Alpert. Memory Hierarchies for Directly Executed Language Microprocessors. PhD thesis, Stanford University, June 1984. CSL-TR-84-260.
|
| |
2
|
B. Bray, K. Cuderman, M. Flynn, and A. Zimmerman. The Computer Architect's Workbench. September 1989. To appear in Proc. IFIP 11th World Computer Congress '89.
|
 |
3
|
|
| |
4
|
Michael J. Flynn and Lee W. Hoevel. Execution architecture: the DELtran experiment. Transactions on Computers, C-32(2):156-175, February 1983.
|
| |
5
|
|
| |
6
|
Johannes M. Mulder. Tradeoffs in Data-Bugler and Processor-Architecture Design. PhD thesis, Stanford University, December 1987.
|
 |
7
|
|
| |
8
|
J. A. Stankovic and T. Weidner. Vertical Migration. In Microprogramming and Firmware Engineering Methods. S. Habib, Ed. Van Nostrand Reinhold, New York, 1988.
|
| |
9
|
|
| |
10
|
R. I. Winner and E. M. Carter. Automated vertical migration to dynamic microcode: an overview and example. IEEE Software, 3(4):6-16, July 1986.
|
CITED BY 3
|
|
|
|
|
J. M. Mulder , R. J. Portier , A. Srivastava, A framework for high-speed controller design, Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture, p.90-96, November 27-29, 1990, Orlando, Florida, United States
|
|
|
|
|