Experience with ADAM synthesis system

ABSTRACT

The ADAM synthesis system consists of two major subsystems: the program tools which synthesize RTL designs from behavioral descriptions and the prediction tools which guide the designer in exploring the design space for a good design. In this paper, we demonstrate the necessity for predictions in narrowing the search space. With the aid of an example, we describe the interaction of a designer with the two subsystems in designing an RTL implementation which maximizes performance while meeting a given area constraint.

REFERENCES

• 1: E. Girczyc. Automatic Generation of Microsequested Data Paths to Realize ADA Circuit Descriptions. PhD thesis, Department of Electronics, Carleton University, July 1984.
• 2: G. Hamachi. Desigrtirtg Finite State Machir~es with PEG. UC Berkeley, 1983.
• 3: R. Jain, M. J. Mlinar, and A. C. Parker. Area- Time Model for Synthesis of Non-Pipelined Designs. In Proceedings of the Irtternational Conference on Computer-Aided-Desi#n, ACM/IEEE, November 1988,
• 4: Rajiv Jain , Alice Parker , Nohbyung Park, Module selection for pipelined synthesis, Proceedings of the 25th ACM/IEEE conference on Design automation, p.542-547, June 12-15, 1988, Atlantic City, New Jersey, United States
• 5: R. Jain , A. Parker , N. Park, Predicting area-time tradeoffs for pipelined design, Proceedings of the 24th ACM/IEEE conference on Design automation, p.35-41, June 28-July 01, 1987, Miami Beach, Florida, United States [doi>10.1145/37888.37893]
• 6: K. Kucukcakar and A. C. Parker. MABAL- A Software Package for Module And Bus ALlocation. International Journal of Computer-Aided VLSI Design, June 1989.
• 7: F. J. Kurdahi and A. C. Parker. Techniques for Area Estimation of VLSI Layouts. IEEE Transactions on Computer-Aided-Design, 8(J.), January 1989.
• 8: Michael C. McFarland, Using bottom-up design techniques in the synthesis of digital hardware from abstract behavioral descriptions, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.474-480, July 1986, Las Vegas, Nevada, United States
• 9: Michael C. McFarland , Alice C. Parker , Raul Camposano, Tutorial on high-level synthesis, Proceedings of the 25th ACM/IEEE conference on Design automation, p.330-336, June 12-15, 1988, Atlantic City, New Jersey, United States
• 10: M. J. Mlinax ~nd A. C. Parker. Estimating Register and Multiplexer Costs in VLSI Design. Technical Report, Department of Electrical Engineering, University of Southern California, 1988.
• 11: M. J. Mlinar and A. C. Parker. PASTA: A Model for Est{mating Control Area. Technical Report, Department of Electrical Engineering, University of Southern California, 1988.
• 12: N. Park and A. C. Parker. Sehwa: A Software Package for Synthesis of Pipelines from Behavioral Specifications. IEEE Transactions on Computer Aided Design, 7(3}, March 1988.
• 13: Alice C. Parker , Jorge T. Pizarro , Mitch Mlinar, MAHA: a program for datapath synthesis, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.461-466, July 1986, Las Vegas, Nevada, United States

INDEX TERMS

Primary Classification:
  B. Hardware
  B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION

Additional Classification:
  B. Hardware
  B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION

  F. Theory of Computation
  F.2 ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY
      F.2.2 Nonnumerical Algorithms and Problems
          Subjects: Sorting and searching

  G. Mathematics of Computing
  G.2 DISCRETE MATHEMATICS

General Terms:
Algorithms, Design, Performance