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Optimal parallel algorithms for transitive closure and point location in planar structures
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Source ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the first annual ACM symposium on Parallel algorithms and architectures table of contents
Santa Fe, New Mexico, United States
Pages: 399 - 408  
Year of Publication: 1989
ISBN:0-89791-323-X
Authors
R. Tamassia  Department of Computer Science, Brown University, Providence, R. I.
J. S. Vitter  Department of Computer Science, Brown University, Providence, R. I.
Sponsors
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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[1] F.N. Afrati, D.Q. Goldin & P.C. Kanellakis, "Efficient Parallelism for Structured Data: Directed Reachability in S-P Dags," Dept. Computer Science, Brown Univ., Tecnical Report CS-88-07, 1988.
 
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[2] M.J. Atallah, R. Cole & M.T. Goodrich, "Cascading Divide-and Conquer: A Technique for Designing Parallel Algorithms," Proc. 28th IEEE Symp. on Foundations of Computer Science (1987), 151-160.
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[11] P. Duchet, Y. Hamidoune, M. Las Vergnas & H. Meyniel, "Representing a Planar Graph by Vertical Lines Joining Different Levels," Discrete Mathematics 46 (1983), 319-321.
 
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[23] P.N. Klein & J.H. Reif, "An Efficient Parallel Algorithm for Planarity," Proc. 27th IEEE Symp. on Foundations of Computer Science (1986), 456-477.
 
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[24] D.T. Lee & F.P. Preparata, "Location of a Point in a Planar Subdivision and its Applications," SIAM J. Computing 6 (1977), 594-606.
 
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[31] F.P. Preparata & R. Tamassia, "Fully Dynamic Techniques for Point Location and Transitive Closure in Planar Structures," Proc. 29th IEEE Symp. on Foundations of Computer Science (1988), 558-567.
 
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[33] I. Rival & J. Urrutia, "Representing Orders by Translating Convex Figures in the Plane," Order 4 (1988), 319- 339.
 
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[34] P. Rosenstiehl & R.E. Tarjan, "Rectilinear Planar Layouts of Planar Graphs and Bipolar Orientations," Discrete & Computational Geometry 1 (1986), 342-351.
 
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[37] M. Schlag, F. Luccio, P. Maestrini, D.T. Lee & C.K. Wong, "A Visibility Problem in VLSI Layout Compaction," in Advances in Computing Research, vol. 2, F.P. Preparata, ed., JAI Press Inc., Greenwich, CT, 1985, 259-282.
 
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[38] J.A. Storer, "On Minimal Node-Cost Planar Embeddings," Networks 14 (1984), 181-212.
 
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[41] R. Tamassia & F.P. Preparata, "Dynamic Maintenance of Planar Digraphs, with Applications," Algorithmica (1989, to appear).
 
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[42] R. Tamassia & I.G. Tollis, "A Unified Approach to Visibility Representations of Planar Graphs," Discrete & Computational Geometry 1 (1986), 321-341.
 
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[43] R. Tamassia & I.G. Tollis, "Efficient Embedding of Planar Graphs in Linear Time," Proc. IEEE Int. Symp. on Circuits and Systems (1987), 495-498.
 
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[44] S. Wimer, I. Koren & I. Cederbaum, "Floorplans, Planar Graphs, and Layouts," IEEE Trans. on Circuits and Systems 35 (1988), 267-278.
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Collaborative Colleagues:
R. Tamassia: colleagues
J. S. Vitter: colleagues