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Comments on "the case for the reduced instruction set computer," by Patterson and Ditzel
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Source ACM SIGARCH Computer Architecture News archive
Volume 8 ,  Issue 6  (October 1980) table of contents
Pages: 34 - 38  
Year of Publication: 1980
ISSN:0163-5964
Authors
Douglas W. Clark  VAX Systems Architecture, Digital Equipment Corporation, Tewksbury, MA
William D. Strecker  VAX Systems Architecture, Digital Equipment Corporation, Tewksbury, MA
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 14,   Downloads (12 Months): 111,   Citation Count: 7
Additional Information:

references   cited by   collaborative colleagues  

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Dietz, W.B., and Szewerenko, L. Computer Family Architecture Selection, Phase IV Final Report: Comparative Evaluation of the Candidate Computer Architectures. Tech. Report, Computer Science Dept., Carnegie-Mellon University, Nov. 1979.
2
David R. Ditzel , David A. Patterson, Retrospective on high-level language computer architecture, Proceedings of the 7th annual symposium on Computer Architecture, p.97-104, May 06-08, 1980, La Baule, United States  [doi>10.1145/800053.801914]
3
David A. Patterson , David R. Ditzel, The case for the reduced instruction set computer, ACM SIGARCH Computer Architecture News, v.8 n.6, p.25-33, October 1980  [doi>10.1145/641914.641917]
 
4
Leonard Jay Shustek, Analysis and performance of computer instruction sets., 1978
 
5
Strecker, W.D. VAX-11/780: A Virtual Address Extension to the DEC PDP-11 Family. <u>Proc. NCC</u>, June 1978, pp. 967--980.

CITED BY  7
David A. Patterson , Richard S. Piepho, RISC assessment: A high-level language experiment, ACM SIGARCH Computer Architecture News, v.10 n.3, p.3-8, April 1982
Robert P. Colwell , Charles Y. Hitchcock , E. Douglas Jensen, Peering through the RISC/CISC fog: an outline of research, ACM SIGARCH Computer Architecture News, v.11 n.1, p.44-50, March 1983
Beatrice Lazzerini, Effective VLSI Processor Architectures for HLL Computers: The RISC Approach, IEEE Micro, v.9 n.1, p.57-65, January 1989
Robert I. Winner , Edward M. Carter, Toward type-oriented dynamic vertical migration, ACM SIGMICRO Newsletter, v.14 n.4, December 1983
Keith Adams , Ole Agesen, A comparison of software and hardware techniques for x86 virtualization, ACM SIGOPS Operating Systems Review, v.40 n.5, December 2006
David A. Patterson, RISCY patents, ACM SIGARCH Computer Architecture News, v.16 n.4, p.169-191, Sept. 1988
Richard R. Oehler, Reduced instruction set computer (RISC), Encyclopedia of Computer Science, 4th edition, John Wiley and Sons Ltd., Chichester, 2003
Collaborative Colleagues:
Douglas W. Clark: colleagues
William D. Strecker: colleagues

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