A transformational approach to binary translation of delayed branches

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A transformational approach to binary translation of delayed branches

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ACM Transactions on Programming Languages and Systems (TOPLAS) archive
Volume 25 , Issue 2 (March 2003) table of contents

Pages: 210 - 224

Year of Publication: 2003

ISSN:0164-0925

Authors

Norman Ramsey	Harvard University, Cambridge, MA
Cristina Cifuentes	Sun Microsystems Laboratories, Palo Alto, CA

Publisher

ACM New York, NY, USA

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ABSTRACT

A binary translator examines binary code for a source machine and generates code for a target machine. Understanding what to do with delayed branches in binary code can involve tricky case analyses, for example, if there is a branch instruction in a delay slot. This article presents a disciplined method for deriving such case analyses. The method identifies problematic cases, shows the translations for the nonproblematic cases, and gives confidence that all cases are considered. The method supports such common architectures as SPARC, MIPS, and PA-RISC, and it should apply to any tool that analyzes machine instructions. We begin by writing a very simple interpreter for the source machine's code. We then transform the interpreter into an interpreter for a target machine without delayed branches. To maintain the semantics of the program being interpreted, we simultaneously transform the sequence of source-machine instructions into a sequence of target-machine instructions. The transformation of the instructions becomes our algorithm for binary translation.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Alfred V. Aho , Ravi Sethi , Jeffrey D. Ullman, Compilers: principles, techniques, and tools, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1986
	2	Daniel P. Siewiorek , Mario Barbacci , James E. Vastyan, Design and Analysis of Instruction Set Processors, McGraw-Hill, Inc., New York, NY, 1982
	3	C. Gordon Bell , A. C. Newell, Computer structures: Readings and examples (McGraw-Hill computer science series), McGraw-Hill Pub. Co., 1971
	4	Cifuentes, C. and Ramsey, N. 2002. A transformational approach to binary translation of delayed branches with applications to SPARC and PA-RISC instruction sets. Tech. Rep. TR-2002-104, Sun Microsystems Laboratories, Palo Alto, CA. January.
	5	Cristina Cifuentes , Doug Simon , Antoine Fraboulet, Assembly to High-Level Language Translation, Proceedings of the International Conference on Software Maintenance, p.228, March 16-19, 1998
	6	Cristina Cifuentes , Mike Van Emmerik, UQBT: Adaptable Binary Translation at Low Cost, Computer, v.33 n.3, p.60-66, March 2000 [doi>10.1109/2.825697]
	7	Cristina Cifuentes , Mike Van Emmerik , Norman Ramsey, The Design of a Resourceable and Retargetable Binary Translator, Proceedings of the Sixth Working Conference on Reverse Engineering, p.280, October 06-08, 1999
	8	Cifuentes, C., Van Emmerik, M., Ramsey, N., and Lewis, B. 2002. Experience in the design, implementation, and use of a retargetable static binary translation framework. Tech. Rep. TR-2002-105, Sun Microsystems Laboratories, Palo Alto, CA. January.
	9	Olivier Danvy , Karoline Malmkjær , Jens Palsberg, Eta-expansion does The Trick, ACM Transactions on Programming Languages and Systems (TOPLAS), v.18 n.6, p.730-751, Nov. 1996 [doi>10.1145/236114.236119]
	10	Neil D. Jones , Carsten K. Gomard , Peter Sestoft, Partial evaluation and automatic program generation, Prentice-Hall, Inc., Upper Saddle River, NJ, 1993
	11	Gerry Kane, MIPS RISC architecture, Prentice-Hall, Inc., Upper Saddle River, NJ, 1988
	12	James R. Larus , Thomas Ball, Rewriting executable files to measure program behavior, Software—Practice & Experience, v.24 n.2, p.197-218, Feb. 1994 [doi>10.1002/spe.4380240204]
	13	Prentice-Hall 1993. System V Application Binary Interface, SPARC Architecture Processor Supplement, third ed. Prentice-Hall, Englewood Cliffs, NJ.
	14	Norman Ramsey , Jack W. Davidson, Machine Descriptions to Build Tools for Embedded Systems, Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems, p.176-192, June 01, 1998
	15	Norman Ramsey , Mary F. Fernández, Specifying representations of machine instructions, ACM Transactions on Programming Languages and Systems (TOPLAS), v.19 n.3, p.492-524, May 1997 [doi>10.1145/256167.256225]
	16	Michiel Ronsse , Koen De Bosschere, JiTI: a robust just in time instrumentation technique, ACM SIGARCH Computer Architecture News, v.29 n.1, p.43-54, March 2001 [doi>10.1145/373574.373589]
	17	Natarajan Shankar, Steps towards mechanizing program transformations using PVS, Science of Computer Programming, v.26 n.1-3, p.33-57, May 1996 [doi>10.1016/0167-6423(96)00003-2]
	18	Richard L. Sites , Anton Chernoff , Matthew B. Kirk , Maurice P. Marks , Scott G. Robinson, Binary translation, Communications of the ACM, v.36 n.2, p.69-81, Feb. 1993 [doi>10.1145/151220.151227]
	19	CORPORATE SPARC International, Inc., The SPARC architecture manual: version 8, Prentice-Hall, Inc., Upper Saddle River, NJ, 1992