1

J.K. Ousterhout, "Crystal: A Timing Analyzer for nMOS VLSI Circuits," Proc. Third Caltech Conference on Very Large Scale Integration, pp. 57--70, 1983.

2

R.W. Sherburne, M.G.H. Katevenis, D.A. Patterson, and C.H. Séquin, "A 32b NMOS Microprocessor with a Large Register File," 31st International Solid States Circuit Conference, San Francisco, February 23--25, 1984.

3

T. Sippel, "Floating RISCs," M.S. Project Report, U.C. Berkeley, September 1982. (Unpublished)

4

F. Ware, "Pipelined IEEE Floating Point Processor," Compcon, February 28-March 3, 1984.

5

H.J. Curnow and B.A. Wichmann, "A Synthetic Benchmark," Computer Journal, vol. 19, no. 1, 1975.

6

B.A. Wichmann and H.J. Curnow, "The Design of Synthetic Programs," in Benchmarking: Computer Evaluation and Measurement, pp. 89--114, John Wiley & Sons, London, 1975.

7

J.W. Verity, "Minis Lose out to PCs," Datamation, vol. 29, no. 11, pp. 44--52, November 1983.

8

J. Miros, "A C Compiler for RISC I," M.S. Project Report, U.C. Berkeley, September 1982. (Unpublished)

9

Carl G Ponder, "... but will RISC run LISP??" (a feasibility study), University of California at Berkeley, Berkeley, CA, 1983

10

Richard A. Blomseth, A Big RISC, University of California at Berkeley, Berkeley, CA, 1983

11

James B. Peck, The VLSI Circuitry of RISC I, University of California at Berkeley, Berkeley, CA, 1983

12

Emmanuel Katevenis, Reduced Instruction Set Computer Architectures for VLSI, University of California at Berkeley, Berkeley, CA, 1983

13

R.W. Sherburne, Processor Design Tradeoffs in VLSI, U.C. Berkeley, May, 1984. PhD Dissertation (in preparation).

14

J. Hennessy, N. Jouppi, F. Baskett, A. Strong, T. Gross, C. Rowen, and J. Gill, "The MIPS Machine," Proc. Compcon, pp. 1--7, San Francisco, California, February 1982.

15

George Radin, The 801 minicomputer, Proceedings of the first international symposium on Architectural support for programming languages and operating systems, p.39-47, March 01-03, 1982, Palo Alto, California, United States

16

David A. Patterson , Richard S. Piepho, RISC assessment: A high-level language experiment, Proceedings of the 9th annual symposium on Computer Architecture, p.3-8, April 26-29, 1982, Austin, Texas, United States

17

Frederick Chi-Tak Chow, A portable machine-independent global optimizer--design and measurements, 1984

18

D. Folger and E. Basart, "Computer Architectures -- Designing for Speed," Compcon, pp. 25--31, February 28-March 3, 1983.

19

R. Ragan-Kelley, "Performance of the Pyramid Computer," Compcon, February 28-March 1, 1983.

20

I. Barron, P. Cavill, D. May, and P. Wilson, "Transputer does 5 or more MIPS even when not used in parallel," Electronics, pp. 109--115., November 17, 1983.

21

C. Barney, "Fewer Instructions Speed Up VLSI," Electronics, vol. 55, no. 23, pp. 101--102, November 17, 1983.

22

B. Supnik and I. Evans, "MicroVAX 32 -- A VAX-Compatible Microprocessor," Compcon, February 28-March 3, 1984.

23

S.J. Metz, "Letter to the Editor," Computer Architecture News, vol. 11, no. 5, December 1983.

24

J. Beck, D. Dobberpuhl, M.J. Doherty, E. Dorenkamp, R. Grondalski, D. Grondalski, K. Henry, M. Miller, R. Supnik, S. Thierauf, and R. Witek, "A 32b Microprocessor with On-Chip Virtual Memory Management," 31st International Solid States Circuit Conference, San Francisco, February 23--25, 1984.

25

D.W. Clark, B.W. Lampson, and K.A. Pier, "The Memory System of a High-Performance Personal Computer," IEEE Transactions on Computers, vol. C-30, no. 10, pp. 715--733, October 1981.

26

S. Ballard and S. Shirron, "The Design and Implementation of VAX/Smalltalk-80," in Smalltalk-80: Bits of History, Words of Advice, ed. Glenn Krasner, pp. 127--150, Addison Wesley, September, 1983.

27

K. McCall, "The Smalltalk-80 Benchmarks," in Smalltalk 80: Bits of History, Words of Advice, ed. Glenn Krasner, pp. 151--173, Addison-Wesley, Reading, MA, 1983.

David A. Patterson, Reduced instruction set computers, Communications of the ACM, v.28 n.1, p.8-21, Jan. 1985

Daniel J. Magenheimer , Liz Peters , Karl Pettis , Dan Zuras, Integer multiplication and division on the HP precision architecture, ACM SIGARCH Computer Architecture News, v.15 n.5, p.90-99, Oct. 1987

Daniel J. Magenheimer , Liz Peters , Karl W. Pettis , Dan Zuras, Integer Multiplication and Division on the HP Precision Architecture, IEEE Transactions on Computers, v.37 n.8, p.980-990, August 1988

Colin Whitby-Strevens, The transputer, ACM SIGARCH Computer Architecture News, v.13 n.3, p.292-300, June 1985

Humayun Khalid, A trace-driven simulation methodology, ACM SIGARCH Computer Architecture News, v.23 n.5, p.27-33, Dec. 1995

David A. Patterson: colleagues