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Overcoming the memory wall in symbolic algebra: a faster permutation multiplication
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Source ACM SIGSAM Bulletin archive
Volume 36 ,  Issue 4  (December 2002) table of contents
DEMONSTRATION SESSION: SIGSAM BULLETIN table of contents
Pages: 1 - 4  
Year of Publication: 2002
ISSN:0163-5824
Authors
Gene Cooperman  Northeastern University, Boston, MA
Xiaoqin Ma  Northeastern University, Boston, MA
Publisher
ACM  New York, NY, USA
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ABSTRACT

The traditional permutation multiplication algorithm is now limited by memory latency and not by CPU speed. A new cache-aware permutation algorithm speeds up permutation multiplication by a factor of 3.4 on current CPUs. The new algorithm is limited by memory bandwidth, but not by memory latency. Current trends indicate improving memory bandwidth and stagnant memory latency. This makes the new algorithm especially important for future computer architectures. In addition, we believe this "memory wall" will soon force a redesign of other common algorithms of symbolic algebra.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Intel PC SDRAM Specification, Revision 1.7, November 1999. http://www.intel.com/technology/memory/pc133sdram/spec/sdram133.htm
 
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Collaborative Colleagues:
Gene Cooperman: colleagues
Xiaoqin Ma: colleagues