Error-correction and crosstalk avoidance in DSM busses

ABSTRACT

Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delays and lead to logic faults, particularly when adjacent lines switch with opposite transitions. At the same time system-level interconnects have also become more susceptible to other less predictable forms of interference such as noise induced by power grid fluctuations, electromagnetic interference, and alpha particle radiation. Previous work has treated these systematic and non-systematic forms of noise separately.In this paper we propose to make system level interconnects more robust using encoding that simultaneously addresses error correction requirements and crosstalk noise avoidance. This is more efficient than satisfying these requirements separately. We give algorithms for obtaining optimal encodings, and present a practical class of codes called boundary shift codes. We evaluate the overhead of our method and make comparisons to using error correction with simple shielding.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

General Terms:
Design

Keywords:
DSM busses, bus encoding, crosstalk noise, error-correction