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Optimal layout of CMOS functional arrays
Source Annual ACM IEEE Design Automation Conference archive
Papers on Twenty-five years of electronic design automation table of contents
Pages: 182 - 191  
Year of Publication: 1988
ISBN:0-89791-267-5
Authors
T. Uehara
W. M. vanCleemput
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): n/a,   Downloads (12 Months): n/a,   Citation Count: 1
Additional Information:

cited by   index terms   collaborative colleagues  

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DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/62882.62902
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CITED BY
Avaneendra Gupta , John P. Hayes, CLIP: integer-programming-based optimal layout synthesis of 2D CMOS cells, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.3, p.510-547, July 2000

INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Logic arrays

Additional Classification:
  G. Mathematics of Computing
  G.2 DISCRETE MATHEMATICS


General Terms:
Algorithms, Design, Performance, Theory

Collaborative Colleagues:
T. Uehara: colleagues
W. M. vanCleemput: colleagues

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