| Clustering and linear placement |
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Annual ACM IEEE Design Automation Conference
archive
Papers on Twenty-five years of electronic design automation
table of contents
Pages: 50 - 56
Year of Publication: 1988
ISBN:0-89791-267-5
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Authors
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D. M. Schuler
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GTE Laboratories, Incorporated Waltham, Massachusetts
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E. G. Ulrich
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GTE Laboratories, Incorporated Waltham, Massachusetts
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| Bibliometrics |
Downloads (6 Weeks): 4, Downloads (12 Months): 14, Citation Count: 4
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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M, A, Breuer, "General Survey of Design Automation of Digital Computers, " Proceedings IEEE, Vol. 54, pp. 1708-1721, December 1966.
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R. Mitchell, Personal Notes.
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E.L. Lawler, "Electrical Assemblies with a Minimum Number of interconnect{ons, " IEEE Transactions on Electronic Computersj Vol. EC-11, pp. 86-88, February 1962.
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6
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R. L. Russo , P. K. Wolff, Sr., ALMS: Automated logic mapping system, Proceedings of the 8th workshop on Design automation, p.118-130, June 28-30, 1971, Atlantic City, New Jersey, United States
[doi> 10.1145/800158.805066]
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D.M. Schuler, "The Clustering of Interconnected Nodes," GTE Laboratories Tectmical Memorandum 70-468.1, December 1970.
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CITED BY 4
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Dirk Behrens , Klaus Harbich , Erich Barke, Hierarchical partitioning, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.470-477, November 10-14, 1996, San Jose, California, United States
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