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The architecture and programming of the Ametek series 2010 multicomputer
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Source Hypercube Concurrent Computers and Applications archive
Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1 table of contents
Pasadena, California, United States
Pages: 33 - 37  
Year of Publication: 1988
ISBN:0-89791-278-0
Authors
C. L. Seitz  Department of Computer Science, California Institute of Technology
W. C. Athas  Department of Computer Science, California Institute of Technology
C. M. Flaig  Department of Computer Science, California Institute of Technology
A. J. Martin  Department of Computer Science, California Institute of Technology
J. Seizovic  Department of Computer Science, California Institute of Technology
C. S. Steele  Department of Computer Science, California Institute of Technology
W-K. Su  Department of Computer Science, California Institute of Technology
Sponsor
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 12,   Citation Count: 46
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ABSTRACT

During the period following the completion of the Cosmic Cube experiment [1], and while commercial descendants of this first-generation multicomputer (message-passing concurrent computer) were spreading through a community that includes many of the attendees of this conference, members of our research group were developing a set of ideas about the physical design and programming for the second generation of medium-grain multicomputers. Our principal goal was to improve by as much as two orders of magnitude the relationship between message-passing and computing performance, and also to make the topology of the message-passing network practically invisible. Decreasing the communication latency relative to instruction execution times extends the application span of multicomputers from easily partitioned and distributed problems (eg, matrix computations, PDE solvers, finite element analysis, finite difference methods, distant or local field many-body problems, FFTs, ray tracing, distributed simulation of systems composed of loosely coupled physical processes) to computing problems characterized by “high flux” [2] or relatively fine-grain concurrent formulations [3, 4] (eg, searching, sorting, concurrent data structures, graph problems, signal processing, image processing, and distributed simulation of systems composed of many tightly coupled physical processes). Such applications place heavy demands on the message-passing network for high bandwidth, low latency, and non-local communication. Decreased message latency also improves the efficiency of the class of applications that have been developed on first-generation systems, and the insensitivity of message latency to process placement simplifies the concurrent formulation of application programs. Our other goals included a streamlined and easily layered set of message primitives, a node operating system based on a reactive programming model, open interfaces for accelerators and peripheral devices, and node performance improvements that could be achieved economically by using the same technology employed in contemporary workstation computers. By the autumn of 1986, these ideas had become sufficiently developed, molded together, and tested through simulation to be regarded as a complete architectural design. We were fortunate that the Ametek Computer Research Division was ready and willing to work with us to develop this system as a commercial product. The Ametek Series 2010 multicomputer is the result of this joint effort.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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2
J D Ullman, "Flux, Sorting, and Supercomputer Organization for AI Applications," J of Parallel and Distributed Computing 1: 133--151, 1984.
 
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P Kermani and L Kleinrock, "Virtual Cutthrough: A New Computer Communication Switching Technique," Computer Networks 3: 267- 286, 1979.
 
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William J Dally, Charles L Seitz, "The Torus Routing Chip," Distributed Computing 1(4): 187- 196, Springer International, 1986.
 
8
William J Dally, "Wire-Efficient VLSI Multiprocessor Communication Networks,~ Pro~ 1987 Stanford Conference on Advanced Research in VLSI, MIT Press, 1987.
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CITED BY  46

Collaborative Colleagues:
C. L. Seitz: colleagues
W. C. Athas: colleagues
C. M. Flaig: colleagues
A. J. Martin: colleagues
J. Seizovic: colleagues
C. S. Steele: colleagues
W-K. Su: colleagues