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An FPGA architecture with built-in error correction capability
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Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays table of contents
Monterey, California, USA
SESSION: Poster session table of contents
Pages: 245 - 245  
Year of Publication: 2003
ISBN:1-58113-651-X
Authors
P. K. Lala  University of Arkansas, Fayetteville, AR
B. Kiran Kumar  University of Arkansas, Fayetteville, AR
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

The use of very deep submicron technology makes VLSI-based digital systems more susceptible to transient or soft errors, and thus compromises their reliability. This paper proposes an FPGA architecture inspired by the human immune system that allows tolerance of transient errors. The architecture is composed of a two-dimensional array of identical functional cells with different genetic codes. These codes are chosen based on the required functions to be performed by the functional cells. An error in a FPGA based digital system designed using the proposed architecture is treated as an antigen by the system. Using its distributed defense mechanism the system heals itself from the effect of the error. A major advantage of this architecture is that, the outputs of functional cells are connected to the inputs of other physically adjacent functional cells without having to go through complicated routing. Thus, lengthy communication paths between cells are avoided.

Collaborative Colleagues:
P. K. Lala: colleagues
B. Kiran Kumar: colleagues