| Programming aspects of VLSI: (preliminary version) |
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Annual Symposium on Principles of Programming Languages
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Proceedings of the 9th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
table of contents
Albuquerque, New Mexico
Pages: 57 - 65
Year of Publication: 1982
ISBN:0-89791-065-6
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Downloads (6 Weeks): 2, Downloads (12 Months): 10, Citation Count: 5
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ABSTRACT
Two components of a VLSI design environment being built at Princeton are described. The general theme of this effort is to make the design of VLSI circuits as similar to programming as possible. A conscious attempt is being made to apply experience in the design of large software systems to the creation of an appropriate environment for VLSI circuits. The two components described are a procedural language to specify circuit layouts and a switch-level circuit simulator for layout produced with this language. They have been chosen for presentation because many issues in their design are very similar to the issues that arise in the design of programming languages and software environments.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Ackland, B., Weste, N., "A pragmatic approach to topological symbolic IC design. design," VLSI'81, pp 117--129, ed. John P. Gray, Academic Press.
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Apsvall, B. and Shiloach Y., "A Polynomial Time Algorithm for Solving Systems of Linear Inequalities with Two variables per Inequality", pp 205--217, Proc. of the twentieth IEEE Symp. on Foundations of Computer Science, 1979.
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Baker, C. M., "Artwork Analysis Tools for VLSI Circuits," M. S. Thesis, MIT, EECS Department, June, 1980.
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Batali, J., Mayle, N., Shrobe, H., Sussman, G., Weise, D., "The DPL/Daedalus Design Environment," VLSI '81, pp 183--192.
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Fan, S. P., Hsueh, M. Y., Newton, A. R., Peterson, D. O., "MOTISC: A new circuit simulator for MOSLSI circutis," IEEE Proc. Int. Symp. Circuits and System, pp 700--703, 1977.
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Mosleller, R.C., "REST: A leaf cell design system," VLSI '81 pp 163--172.
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