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Wave pipelining for application-specific networks-on-chips
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Source International Conference on Compilers, Architecture and Synthesis for Embedded Systems archive
Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems table of contents
Grenoble, France
SESSION: Session 7: embedded system techniques (2) table of contents
Pages: 198 - 201  
Year of Publication: 2002
ISBN:1-58113-575-0
Authors
Jiang Xu  Princeton University
Wayne Wolf  Princeton University
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper presents methods for optimizing application-specific networks-on-chips (NoCs). We show that wave pipelining provides more energy efficient data transport than non-wave pipelined communication. We observe 52% energy saving, 60% transistor area saving, and 1.7 times speedup by using wave pipelining in simulation. Wave pipelining is particularly well suited to networks-on-chips because the networkes structured interconnection provides better delay control. Our analysis shows how designers can tune their network to the requirements of the application by choosing a design point along area/performance or area/energy curves.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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