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 ABSTRACT
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a structured approach for implementing process networks. We use process networks as re-usable and architecture-independent functional specifications. The method facilitates the cost-driven and constraint-driven source code transformation of process networks into architecture-specific implementations in the form of communicating tasks. We apply the method to implement a JPEG decoding process network in software on a set of MIPS processors. We apply three transformations to optimize synchronization rates and data transfers and to exploit data parallelism for this target architecture. We evaluate the impact of the source code transformations and the performance of the resulting implementations in terms of design time, execution time, and code size. The results show that process networks can be implemented quickly and efficiently on embedded multiprocessor systems.
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Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 13
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P. Poplavko , T. Basten , M. Bekooij , J. van Meerbergen , B. Mesman, Task-level timing models for guaranteed performance in multiprocessor networks-on-chip, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
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Pieter van der Wolf , Erwin de Kock , Tomas Henriksson , Wido Kruijtzer , Gerben Essink, Design and programming of embedded multiprocessors: an interface-centric approach, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 08-10, 2004, Stockholm, Sweden
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Alexandru Turjan , Bart Kienhuis , Ed Deprettere, Translating affine nested-loop programs to process networks, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
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Sjoerd Meijer , Bart Kienhuis , Alex Turjan , Erwin de Kock, Interactive presentation: A process splitting transformation for Kahn process networks, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
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Akash Kumar , Bart Mesman , Bart Theelen , Henk Corporaal , Yajun Ha, Analyzing composability of applications on MPSoC platforms, Journal of Systems Architecture: the EUROMICRO Journal, v.54 n.3-4, p.369-383, March, 2008
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