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An APL Compiler for a Vector Processor
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Volume 6 ,  Issue 3  (July 1984) table of contents
Pages: 297 - 313  
Year of Publication: 1984
ISSN:0164-0925
Author
Timothy A. Budd  Department of Computer Science, University of Arizona, Tucson, AZ
Publisher
ACM  New York, NY, USA
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
ABRAMS, P. An APL Machine. SLAC rep. 114. Stanford Univ., Palo Alto, Calif., 1970.
 
2
BERNECKY, B. Speeding Up Dyadic Iota and Dyadic Epsilon. In Proceedings of the APL Congress 73 (Copenhagen, Denmark, Aug. 22-24). Elsevier North-Holland, New York, 1973, pp. 479-482.
 
3
BROOE, B. Precompilation of Fortran programs to facilitate array processing. COMPUTER 14, 9 (Sept. 1981), 46-52.
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5
BUDO, T.A. An APL compiler. Tech. Rep. 81-17, Univ. of Arizona, Tucson, Ariz., Oct. 1981.
 
6
BUDD, T.A. ANO TREAT, J. Extensions of grid selector composition. Tech. Rep. 82-7, Univ. of Arizona, Tucson, Ariz., July 1982.
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8
CRAY. Cray-1 Computer System Re{erence Manual. Cray Research, Inc., Bloomington, Minn., 1977.
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HINTZ, R.G. AND TATS:, D.P. Control Data STAR-100 processor design, COMPCON Dig. (Feb. 1972), 1-4.
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19
SLOTNICK D.L. The fastest computer. Scientific American 224, 2 (Feb. 1971), 76-87.
 
20
WATSON, W.J. The TIASC--A highly modular and flexible supercomputer architecture, in Proceedings o{ the AFIPS 1972 Fall Joint Computer Con{erence (Anaheim, Calif., Dec. 5-7). AFIPS Press, Reston, Va., 1972, pp. 221-228.

CITED BY  14