| Implementation of response surface methodology using variance reduction techniques in semiconductor manufacturing |
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Winter Simulation Conference
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Proceedings of the 33nd conference on Winter simulation
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Arlington, Virginia
SESSION: Semiconductor manufacturing
table of contents
Pages: 1225 - 1230
Year of Publication: 2001
ISBN:0-7803-7309-X
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Authors
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Charles D. McAllister
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The Pennsylvania State University, University Park, PA
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Bertan Altuntas
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The Pennsylvania State University, University Park, PA
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Matthew Frank
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The Pennsylvania State University, University Park, PA
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Juergen Potoradi
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Infineon Technologies, Advanced Logic SDN. BHD., Free trade zone Batu Berendam, 75914 Melaka, MALAYSIA
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IEEE Computer Society
Washington, DC, USA
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Downloads (6 Weeks): 2, Downloads (12 Months): 15, Citation Count: 0
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ABSTRACT
Semiconductor manufacturing is generally considered a cyclic industry. As such, individual producers able to react quickly and appropriately to market conditions will have a competitive advantage. Manufacturers who maintain low work in process inventory, ensure that specialized equipment is in good repair, and produce quality products at least possible cost will have the best opportunities to effectively compete and excel in these challenging venues. To support this nimble business model, our current efforts are directed toward creating efficient, accurate metamodels of the impact of maintenance policies on production efficiency. These validated polynomial approximations facilitate rapid exploration of the design region, compared with the original simulation models. The experiment design used for metamodel construction employed variance reduction techniques. When compared to a similar experiment design using independent streams, the variance reduction approach provided a decrease in standard error of the regression coefficients and smaller average error when validated against the simulation response.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Aguilar, R. A. 2000. Assembly and Test Process Overview. Internet document, 〈http://www.eas.asu.edu/~masmlab/〉, Arizona State University.
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2
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Barton, R. R. 2000. IE 578: Using Simulation Models for Engineering Design. Fall semester lecture notes, The Pennsylvania State University.
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3
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Factory Explorer User Manual. 1995. Pleasanton, CA: Wright Williams & Kelley.
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Navdeep S. Grewal , Alvin C. Bruska , Timbur M. Wulf , Jennifer K. Robinson, Integrating targeted cycle-time reduction into the capital planning process, Proceedings of the 30th conference on Winter simulation, p.1005-1010, December 13-16, 1998, Washington, D.C., United States
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Potoradi, J., 2000. Documentation of Simulation Model for Semiconductor Backend Manufacturing, Technical Paper, Infineon Technologies, Inc.
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Schmeiser, B. W. 1999. IE 581: Simulation Design and Analysis. Spring semester lecture notes, Purdue University.
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Schruben, L. W. and B. H. Margolin. 1978. Pseudo-random number assignment in statistically designed simulation and distribution sampling experiments. Journal of the American Statistical Association 73, 504-525.
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