Performance of a shared memory system for vector multiprocessors

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Performance of a shared memory system for vector multiprocessors

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International Conference on Supercomputing archive
Proceedings of the 2nd international conference on Supercomputing table of contents

St. Malo, France

Pages: 315 - 325

Year of Publication: 1988

ISBN:0-89791-272-1

Authors

S. W. Turner	Univ. of Illinois, Urbana, IL
A. V. Veidenbaum	Univ. of Illinois, Urbana, IL

Sponsor

SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 11, Downloads (12 Months): 16, Citation Count: 7

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	G.H. Barnes, S.F. Lundstrom. "Design and Validation of a Connection l~'etwork for Many- Processor Multiprocessor Systems," IEEE Computer, December 1981, pp. 31-41.
	2	L.N. Bhuyan, D.P. Agrawal, "Design and Performance of Generalized Intereonneetion Networks," IEEE Trans. on Co raputers, Vol. C-32, No. 12, pp. 1081-1089, Dee. 1983.
	3	D.M. Dias, R. Jump, ~Analysis and Simulation of Buffered Delta Networks," IEEE Transactions on Computers, vol. C-30, no. 4, pp. 273-282 April, 1981.
	4	A. Gottlieb, R. Grishman, C.P. Kruskal, K.P. MeAulitfe, L. Rudolph, and M. Snir, "The NYU Ultraeomputer - Designing an MIMD Shared- Memory Parallel Machine," IEEE Trans. on Computers, Vol. C-32, No. 2, pp. 175-189, February 1983.
	5	Daniel Gajskl, David Kuek, Duncan Lawrie, and .~hmed Samek, "Cedar- a Large Scale Multiprocessor," Proceedings of the 1983 International Conference on Parallel Processing, pp. 524-529, August, 1983.
	6	C. P. Kruskal, M. Snir, "The performance of Multistage Intereonneetion Networks for Multiproeessors," IEEE Transactions on Computers, vol. C-32, no. 12, pp. 1091-98, December, 1983.
	7	D.J. Kuck, R.H. Kuhn, B. Leasure, and M. Wolfe, "The Structure of an Advanced Vectorizer for Pipelined Processors," Fourth International Computer Software and Applications Conference, October, 1980.
	8	D. H. Lawrie, "Access and Alignment of Data in an Array Processor," IEEE Transactions on Computers, vol. C-24, no. 12, pp. 1145-1155, December, 1975.
	9	J.H. Patel. "Performance of Processor-Memory Intereonneetions for Multiprocessors" IEEE Trans. on Computers, Vol. C.-30, No. 10, pp. 771- 780, October 1981
	10	M.C. Pease "The Indirect Binary n-cube Microprocessor Array," IEEE Transactions on Computers, vol. C-26, no. 5, pp. 458-473, May, 1977.
	11	G.F. Pfister et al, "The IBM Research Parallel Processor Prototype," Proceedings of the 1985 International Conference on Parallel Processiny~ pp. 764-772, 1985.
	12	G.F. Pfister, V.A. Norton, "Hot-Spot Contention and Combining in Multistage Interconneetion Networks," Proceedings of the 1985 International Conference on Parallel Processing, pp. 790-797, 1985.
	13	Michael Joseph Wolfe, Optimizing supercompilers for supercomputers, 1982

CITED BY 7

	Stephen W. Turner , Alexander V. Veidenbaum, Scalability of the cedar system, Proceedings of the 1994 ACM/IEEE conference on Supercomputing, November 14-18, 1994, Washington, D.C.
	S. Abraham , K. Padmanabhan, Effect of data access delays and system partitionability on the dynamic performance of a shared memory multiprocessor, Proceedings of the 1992 ACM/IEEE conference on Supercomputing, p.674-682, November 16-20, 1992, Minneapolis, Minnesota, United States
	Stephen W. Turner , Alexander V. Veidenbaum, Scalability of the Cedar system, Proceedings of the 1994 conference on Supercomputing, p.247-254, December 1994, Washington, D.C., United States
	Josep Torrellas , Zheng Zhang, The performance of the Cedar multistage switching network, Proceedings of the 1994 conference on Supercomputing, p.265-274, December 1994, Washington, D.C., United States
	J. E. Smith , W. R. Taylor, Characterizing memory performance in vector multiprocessors, Proceedings of the 6th international conference on Supercomputing, p.35-44, July 19-24, 1992, Washington, D. C., United States
	Josep Torrellas , Zheng Zhang, The performance of the cedar multistage switching network, Proceedings of the 1994 ACM/IEEE conference on Supercomputing, November 14-18, 1994, Washington, D.C.
	Josep Torrellas , Zheng Zhang, The Performance of the Cedar Multistage Switching Network, IEEE Transactions on Parallel and Distributed Systems, v.8 n.4, p.321-336, April 1997