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BVE: a wafer-scale engine for differential equation computation
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Source International Conference on Supercomputing archive
Proceedings of the 2nd international conference on Supercomputing table of contents
St. Malo, France
Pages: 101 - 107  
Year of Publication: 1988
ISBN:0-89791-272-1
Authors
J. G. Delgado-Frias  Univ. of Oxford, Oxford, UK
D. M. Green  Univ. of Oxford, Oxford, UK
Sponsor
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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ABSTRACT

With the advent of specialized VLSI and WSI hardware components the finite difference algorithms for solving differential equations become more attractive. This paper presents a novel computer architecture dedicated to compute boundary value problems. Improvement in speed and reliability can be obtained by means of WSI technology; however, a fault/defect tolerant scheme must be designed. Here we present a time redundancy approach which uses all the available computational resources; this is there is no spare or idle processors. This special purpose WSI parallel architecture runs as a loosely coupled MIMD (multi-instruction multi-data streams) machine and may execute more than 100 million instructions per second. The main features of this boundary value engine (BVE) are: 1) local communication -connections are limited to nearest neighbor; 2) cell regularity -all processors, memories and buses are identical; and 3) fault-tolerance -faulty modules are discarded by means of a novel time redundancy approach. As the feature size continues to shrink, the architecture can easily be extended to accommodate more computational cells.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Collaborative Colleagues:
J. G. Delgado-Frias: colleagues
D. M. Green: colleagues