ACM Portal
  Subscribe (Full Service)    Register (Limited Service, Free)    Login
  Search:   The ACM Digital Library   The Guide
  
ACM Home Page
Please provide us with feedback. Feedback
A novel effective address calculation mechanism for RISC microprocessors
Full text PdfPdf (344 KB)
Source ACM SIGARCH Computer Architecture News archive
Volume 16 ,  Issue 4  (September 1988) table of contents
Special Issue: Architectural Support for Operating Systems
Pages: 150 - 156  
Year of Publication: 1988
ISSN:0163-5964
Author
Gordon B. Steven  School of Information Sciences, Hatfield Polytechnic, College Lane, Hatfield, Herts, AL10 9AB, UK
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 21,   Downloads (12 Months): 32,   Citation Count: 4
Additional Information:

references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/54331.54344
What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
S. McFarling , J. Hennesey, Reducing the cost of branches, Proceedings of the 13th annual international symposium on Computer architecture, p.396-403, June 02-05, 1986, Tokyo, Japan
2
P. Chow , M. Horowitz, Architectural tradeoffs in the design of MIPS-X, Proceedings of the 14th annual international symposium on Computer architecture, p.300-308, June 02-05, 1987, Pittsburgh, Pennsylvania, United States  [doi>10.1145/30350.30384]
 
3
3) Horowitz M., Chow P., Stark D., Simoni R. T., Salz A., Przybylski S., Hennessy J., Gulak G., Agarwal A. and Acken J. M., "MIPS-X: A 20-MIPS Peak, 32-bit Microprocessor with on-chip Cache", IEEE Journal of Solid-State Circuits, Vol. SC-22, No. 5, October 87, pp. 790-799.
4
F. Chow , S. Correll , M. Himelstein , E. Killian , L. Weber, How many addressing modes are enough?, Proceedings of the second international conference on Architectual support for programming languages and operating systems, p.117-121, October 1987, Palo Alto, California, United States
 
5
5) Johnson M., "System Considerations in the Design of the AMD29000", IEEE Micro, August 87, pp. 28-41.
6
David R. Ditzel , H. R. McLellan, Register allocation for free: The C machine stack cache, Proceedings of the first international symposium on Architectural support for programming languages and operating systems, p.48-56, March 01-03, 1982, Palo Alto, California, United States
7
Andrew S. Tanenbaum, Implications of structured programming for machine architecture, Communications of the ACM, v.21 n.3, p.237-246, March 1978  [doi>10.1145/359361.359454]

CITED BY  4
Todd M. Austin , Dionisios N. Pnevmatikatos , Gurindar S. Sohi, Streamlining data cache access with fast address calculation, ACM SIGARCH Computer Architecture News, v.23 n.2, p.369-380, May 1995
Andy Glew, An empirical investigation of OR indexing, ACM SIGMETRICS Performance Evaluation Review, v.17 n.2, p.41-49, Jan. 1990
Rod Adams , Gordon Steven, A parallel pipelined processor with conditional instruction execution, ACM SIGARCH Computer Architecture News, v.19 n.1, p.135-142, March 1991
Bernard K. Gunther, A high speed mechanism for short branches, ACM SIGARCH Computer Architecture News, v.18 n.4, p.59-61, Dec. 1990

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.1 Single Data Stream Architectures

          Nouns: RISC**

Additional Classification:
  K. Computing Milieux
  K.8 PERSONAL COMPUTING

      Nouns: VisiCalc


General Terms:
Design

Collaborative Colleagues:
Gordon B. Steven: colleagues

The ACM Portal is published by the Association for Computing Machinery. Copyright © 2009 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player