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Model checking algorithms for analog verification
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 39th annual Design Automation Conference table of contents
New Orleans, Louisiana, USA
SESSION: Advances in analog modeling table of contents
Pages: 542 - 547  
Year of Publication: 2002
ISBN ~ ISSN:0738-100X , 1-58113-461-4
Authors
Walter Hartong  University of Hannover, Hannover, Germany
Lars Hedrich  University of Hannover, Hannover, Germany
Erich Barke  University of Hannover, Hannover, Germany
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 9,   Downloads (12 Months): 59,   Citation Count: 9
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ABSTRACT

In this contribution we present the first method for model checking on nonlinear analog systems. Based on digital CTL model checking algorithms and results in hybrid model checking, we have developed a concept to adapt these ideas to analog systems. Using an automatic state space subdivision method the continuous state space is transfered into a discrete model. In doing this, the most challenging task is to retain the essential nonlinear behavior of the analog system. To describe analog specification properties, an extension to the CTL language is needed. Two small examples show the properties and advantages of this new method and the capability of the implemented prototype tool.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  9

Collaborative Colleagues:
Walter Hartong: colleagues
Lars Hedrich: colleagues
Erich Barke: colleagues