Low power storage cycle budget distribution tool support for hierarchical graphs

ABSTRACT

In data dominated applications, like multi-media and telecom applications, data storage and transfers are the most important factors in terms of energy consumption, area and system performance. Several steps which optimize these costs are present in our systematic Data Transfer and Storage Exploration methodology. In the important step discussed in this paper, the cycle budget available for background storage transfers is globally distributed over the application's memory accesses that are typically grouped in the loop and function hierarchy. This is crucial for meeting the real-time constraints with a customized memory organisation without counteracting the memory size and energy budget optimizations achieved by earlier steps in our script.This paper proves the effectiveness of the prototype tool on driver applications of several application domains. It clearly shows the tradeoff between power, area and speed.

REFERENCES

• 1: Florin Balasa , Francky Catthoor , Hugo De Man, Dataflow-driven memory allocation for multi-dimensional signal processing systems, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.31-34, November 06-10, 1994, San Jose, California, United States
• 2: E.Brockmeyer, J.D'Eer, N.Busa', F.Catthoor, P.Lippens, J.Huiskens, "Code transformations for reduced data transfer and storage in low power realization of DAB synchro core", Patmos'99, Kos, Greece, Oct 6-8, 1999.
• 3: E.Brockmeyer, S.Wuytack, A.Vandecappelle, F.Catthoor, "Low power storage for hierarchical graphs", Proc. 3rd ACM/IEEE Design Automation Test in Europe Conf., Paris, France, pp., April 2000.
• 4: Erik Brockmeyer , Arnout Vandecappelle , Francky Catthoor, Systematic cycle budget versus system power trade-off: a new perspective on system exploration of real-time data-dominated applications, Proceedings of the 2000 international symposium on Low power electronics and design, p.137-142, July 25-27, 2000, Rapallo, Italy [doi>10.1145/344166.344552]
• 5: F.Catthoor, S.Wuytack, E.De Greef, F.Franssen, L.Nachtergaele. H.De Man, "System-level transformations for low power data transfer and storage", in paper collection on "Low power CMOS design" (eds. A.Chandrakasan, R.Brodersen), IEEE Press, pp.609-618, 1998.
• 6: Francky Catthoor , Eddy de Greef , Sven Suytack, Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design, Kluwer Academic Publishers, Norwell, MA, 1998
• 7: F.Catthoor, K.Danckaert, C.Kulkarni, T.Omnes, "Data transfer and storage architecture issues and exploration in multimedia processors"", book chapter in ""Programmable Digital Signal Processors: Architecture, Programming, and Applications" (ed. Y.H.Yu), Marcel Dekker, Inc., New York, 2000.
• 8: Eddy De Greef , Francky Catthoor , Hugo De Man, Memory size reduction through storage order optimization for embedded parallel multimedia applications, Parallel Computing, v.23 n.12, p.1811-1837, Dec. 1997 [doi>10.1016/S0167-8191(97)00089-6]
• 9: P.Ellervee, M.Miranda, F.Catthoor, A.Hemani, "Exploiting data transfer locality in memory mapping", Proc. 25th EuroMicro Conf., Milan, Italy, pp.14-21, Sep. 1999.
• 10: J. Ph. Diguet , S. Wuytack , F. Catthoor , H. De Man, Formalized methodology for data reuse exploration in hierarchical memory mappings, Proceedings of the 1997 international symposium on Low power electronics and design, p.30-35, August 18-20, 1997, Monterey, California, United States [doi>10.1145/263272.263278]
• 11: P. E. R. Lippens , J. L. van Meerbergen , W. F. J. Verhaegh , A. van der Werf, Allocation of multiport memories for hierarchical data stream, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.728-735, November 07-11, 1993, Santa Clara, California, United States
• 12: Thierry J.-F. Omnés , Thierry Franzetti , Francky Catthoor, Interactive co-design of high throughput embedded multimedia, Proceedings of the 37th conference on Design automation, p.328-331, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337430]
• 13: P.Paulin, J.Knight, "Force-directed scheduling for the behavioral synthesis of ASIC's", IEEE Trans. on CAD, Vol.8, No.6, pp.661-679, June 1989.
• 14: Nelson Luiz Passos , Edwin Hsing-Mean Sha, Push-up scheduling: Optimal polynomial-time resource constrained scheduling for multi-dimensional applications, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.588-591, November 05-09, 1995, San Jose, California, United States
• 15: J. Robinson, Efficient general-purpose image compression with binary tree predictive coding. IEEE Trans. on Image Processing, 6(4):601-608, Apr. 1997.
• 16: Leon Stok, Data path synthesis, Integration, the VLSI Journal, v.18 n.1, p.1-71, Dec. 1994 [doi>10.1016/0167-9260(94)90011-6]
• 17: Arnout Vandecappelle , Miguel Miranda , Erik Brockmeyer , Francky Catthoor , Diederik Verkest, Global multimedia system design exploration using accurate memory organization feedback, Proceedings of the 36th ACM/IEEE conference on Design automation, p.327-332, June 21-25, 1999, New Orleans, Louisiana, United States [doi>10.1145/309847.309945]
• 18: W.Verhaegh, P.Lippens, E.Aarts, J.Korst, J.van Meerbergen, A.van der Werf, "Improved Force-Directed Scheduling in High-Throughput Digital Signal Processing", IEEE Transactions on CAD and Systems, Vol.14, No.8, Aug. 1995.
• 19: W.Verhaegh, "Multidimensional Periodic Scheduling", Ph.D. dissertation, Eindhoven University of Technology, Oct. 1995.
• 20: S.Wuytack, F.Catthoor, F.Franssen, L.Nachtergaele, H.De Man, "Global communication and memory optimizing transformations for low power systems", IEEE Intnl. Worksh. on Low Power Design, Napa CA, pp.203-208, Apr. 1994.
• 21: Sven Wuytack , Jean-Philippe Diguet , Francky V. M. Catthoor , Hugo J. De Man, Formalized methodology for data reuse exploration for low-power hierarchical memory mappings, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.6 n.4, p.529-537, Dec. 1998 [doi>10.1109/92.736124]
• 22: Sven Wuytack , Francky Catthoor , Gjalt de Jong , Hugo J. De Man, Minimizing the required memory bandwidth in VLSI system realizations, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.7 n.4, p.433-441, Dec. 1999 [doi>10.1109/92.805750]