| Embedded systems verification with FGPA-enhanced in-circuit emulator |
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International Symposium on Systems Synthesis
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Proceedings of the 13th international symposium on System synthesis
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Madrid, Spain
SESSION: System level modeling and verification
table of contents
Pages: 143 - 148
Year of Publication: 2000
ISBN:1080-1082
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Authors
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M. Meerwein
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Robert Bosch GmbH, Automotive Equipment Division 8, 72703 Reutlingen, Germany, Matthias.Meerwein@de.bosch.com
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C. Baumgartner
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Robert Bosch GmbH, Automotive Equipment Division 8, 72703 Reutlingen, Germany,
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T. Wieja
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Robert Bosch GmbH, Automotive Equipment Division 8, 72703 Reutlingen, Germany,
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W. Glauert
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Institute for Computer Aided Circuit Design, University of Erlangen-Nuremberg, 91052 Erlangen, Germany, whg@lrs.e-technik.uni-erlangen.de
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IEEE Computer Society
Washington, DC, USA
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| Bibliometrics |
Downloads (6 Weeks): 5, Downloads (12 Months): 25, Citation Count: 2
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ABSTRACT
In this paper we present a novel coverification concept for embedded microcontrollers that satisfies industrial requirements. Based on a commercially available CPU in-circuit emulator coupled with FPGA boards, it verifies the correctness of an implementation in terms of function and timing within a real-world environment.Using our system, the software engineer can write, test and optimize programs for a chip that is not yet physically existent. In addition the system is used to obtain software module characterization data required for system partitioning. Its ability to integrate analog circuitry enables verification of the complete system-on-chip. Our methodology is fully integrated into the ASIC design flow providing ease of use and a high level of verification accuracy.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Felice Balarin , Massimiliano Chiodo , Paolo Giusto , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Claudio Passerone , Alberto Sangiovanni-Vincentelli , Ellen Sentovich , Kei Suzuki , Bassam Tabbara, Hardware-software co-design of embedded systems: the POLIS approach, Kluwer Academic Publishers, Norwell, MA, 1997
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Gajski, D., Vahid, F., Narayan, S., Gong, J.: SpecSyn: An Environment Supporting the Specify-Explore-Refine Paradigm for Hardware/Software System Design, IEEE Trans. on VLSI Systems, Vol. 6, No.1, pp. 84-100, 1998
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Aubory, M., Page, I., Plunkett, D., Sauer, M., Saul, J.: Advanced Silicon Prototyping in a Reconfigurable Environment, http://www.comlab.ox.ac.uk/oucl/users/ian.page/ papers.html
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Jie Liu , Marcello Lajolo , Alberto Sangiovanni-Vincentelli, Software timing analysis using HW/SW cosimulation and instruction set simulator, Proceedings of the 6th international workshop on Hardware/software codesign, p.65-69, March 15-18, 1998, Seattle, Washington, United States
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Verkest, D.: Hardware/Software Co-design beyond Co-simulation, Proceedings of the MEDEA/ESPRIT Conference HW/SW Codesign, September 16-18 1998, Grenoble, France
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Krupnova, H., Saucier, G., Nguyen, H.: An Advanced Approach to System Prototyping, Proceedings of the MEDEA/ ESPRIT Conference HW/SW Codesign, September 16-18 1998, Grenoble, France
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CITED BY 2
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Dohyung Kim , Chan-Eun Rhee , Youngmin Yi , Sungchan Kim , Hyunguk Jung , Soonhoi Ha, Virtual synchronization for fast distributed cosimulation of dataflow task graphs, Proceedings of the 15th international symposium on System Synthesis, October 02-04, 2002, Kyoto, Japan
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