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An energy efficient rate selection algorithm for voltage quantized dynamic voltage scaling
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Source International Symposium on Systems Synthesis archive
Proceedings of the 14th international symposium on Systems synthesis table of contents
Montréal, P.Q., Canada
Session: Synthesis for Low Power table of contents
Pages: 124 - 129  
Year of Publication: 2001
ISBN:1-58113-418-5
Authors
Lama H. Chandrasena  Adelaide University, Adelaide, Australia
Priyadarshana Chandrasena  Adelaide University, Adelaide, Australia
Michael J. Liebelt  Adelaide University, Adelaide, Australia
Sponsors
IEEE : IEEE Computer Society Technical Committee on Design Automation
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 15,   Citation Count: 7
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ABSTRACT

This paper presents a highly energy efficient alternative algorithm to the conventional workload averaging technique for voltage quantized dynamic voltage scaling. This algorithm incorporates the strengths of the conventional workload averaging technique and our previously proposed Rate Selection Algorithm, resulting in higher energy savings while minimizing the buffer size requirement and improving the overall system stability by minimizing the number of voltage transitions. Our experimental work using the Forward Mapped Inverse Discrete Cosine Transform computation (FMIDCT) as the variable workload computation, nine 300-frame MPEG-2 video sequences as the test data, and a 4-level voltage quantization shows that our algorithm produces better energy savings in all test cases when compared to the workload averaging technique, and the maximum energy saving for the test cases was 23%.



CITED BY  7

Collaborative Colleagues:
Lama H. Chandrasena: colleagues
Priyadarshana Chandrasena: colleagues
Michael J. Liebelt: colleagues