| Loop fusion for memory space optimization |
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International Symposium on Systems Synthesis
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Proceedings of the 14th international symposium on Systems synthesis
table of contents
Montréal, P.Q., Canada
Session: Memory aspects in system design
table of contents
Pages: 95 - 100
Year of Publication: 2001
ISBN:1-58113-418-5
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Authors
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Antoine Fraboulet
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Institut National des Sciences Appliquées de Lyon, Villeurbanne, France
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Karen Kodary
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Institut National des Sciences Appliquées de Lyon, Villeurbanne, France
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Anne Mignotte
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Institut National des Sciences Appliquées de Lyon, Villeurbanne, France
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Downloads (6 Weeks): 1, Downloads (12 Months): 16, Citation Count: 10
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ABSTRACT
Portable or embedded systems as well as submicronic technologies have made the power consumption criterium crucial. Memory is known to be extremely power consuming. Moreover multimedia applications are memory intensive applications. Therefore, we propose new techniques to optimize a behavioral description of multimedia applications before the hardware/software partitioning (Codesign). These transformations are performed on "for" loops that constitute the main parts which handle the arrays of the multimedia code. This paper presents an optimal algorithm to reduce the use of temporary arrays by loop fusion. Although the algorithm is not polynomial, experiments have shown that it is very efficient.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 10
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Youcef Bouchebaba , Bruno Girodias , Gabriela Nicolescu , El Mostapha Aboulhamid , Bruno Lavigueur , Pierre Paulin, MPSoC memory optimization using program transformation, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.12 n.4, p.43-es, September 2007
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B. Girodias , Y. Bouchebaba , G. Nicolescu , E. M. Aboulhamid , P. Paulin , B. Lavigueur, Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications, Journal of Signal Processing Systems, v.57 n.2, p.263-283, November 2009
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