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Retargetable static timing analysis for embedded software
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Source International Symposium on Systems Synthesis archive
Proceedings of the 14th international symposium on Systems synthesis table of contents
Montréal, P.Q., Canada
Session: H/S Embedded Systems table of contents
Pages: 39 - 44  
Year of Publication: 2001
ISBN:1-58113-418-5
Authors
Kaiyu Chen  Princeton University, Princeton, NJ
Sharad Malik  Princeton University, Princeton, NJ
David I. August  Princeton University, Princeton, NJ
Sponsors
IEEE : IEEE Computer Society Technical Committee on Design Automation
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 10,   Downloads (12 Months): 17,   Citation Count: 8
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ABSTRACT

This paper presents a novel approach for retargetable static software timing analysis. Specifically, we target the problem of determining bounds on the execution time of a program on modern processors, and solve this problem in a retargetable software development environment. Another contribution of this paper is the modeling of important features in contemporary architectures, such as branch prediction, predication, and instruction pre-fetching, which have great impact on system performance, and have been rarely handled thus far. These ideas allow to build a timing analysis tool that is efficient, accurate, modular and retargetable. We present preliminary results for sample embedded programs to demonstrate the applicability of the proposed approach.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  8

Collaborative Colleagues:
Kaiyu Chen: colleagues
Sharad Malik: colleagues
David I. August: colleagues