An optimal memory allocation for application-specific multiprocessor system-on-chip

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An optimal memory allocation for application-specific multiprocessor system-on-chip

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International Symposium on Systems Synthesis archive
Proceedings of the 14th international symposium on Systems synthesis table of contents

Montréal, P.Q., Canada

Session: Memory optimization methodologies table of contents

Pages: 19 - 24

Year of Publication: 2001

ISBN:1-58113-418-5

Authors

Samy Meftali	TIMA laboratory, Grenoble cedex, France
Ferid Gharsalli	TIMA laboratory, Grenoble cedex, France
Frederic Rousseau	TIMA laboratory, Grenoble cedex, France
Ahmed A. Jerraya	TIMA laboratory, Grenoble cedex, France

Sponsors

IEEE : IEEE Computer Society Technical Committee on Design Automation
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 33, Citation Count: 16

Additional Information:

abstract references cited by index terms collaborative colleagues

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ABSTRACT

In this paper, we present a novel and systematic approach for the design of shared memory architectures in the case of application-specific multiprocessor system-on-chip. This paper focuses on a memory allocation step which is based on an integer linear programming model. It permits to obtain an optimal distributed shared memory architecture minimizing the global cost to access the shared data in the application, and the memory cost. Our approach allows automatic generation of an architecture-level specification of the application. The effectiveness of this approach is illustrated by a packet routing switch example.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	S.V Adve, V.S Pai, P. Ranganathan, "Recent Advances in Memory Consistency Models for Hardware Shared Memory Systems", Special issue on distributed Shared-Memory Systems, Mars 1999.
	2	C. Amza, A. Cox, S. Dwarkadas, L. Jin & al, "Adaptive Protocols for Software Distributed Shared Memory", Special issue on distributed Shared-Memory Systems, Mars 1999.
	3	A. Baghdadi , D. Lyonnard , N. Zergainoh , A. Jerraya, An efficient architecture model for systematic design of application-specific multiprocessor SoC, Proceedings of the conference on Design, automation and test in Europe, p.55-63, March 2001, Munich, Germany
	4	Francky Catthoor , Eddy de Greef , Sven Suytack, Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design, Kluwer Academic Publishers, Norwell, MA, 1998
	5	F. Cathoor, S. Wuytack & al, "System level transformations for low power data transfer and storage", in paper collection "low power CMOS design >>, IEEE Press, pp.609-618, 1998.
	6	David E. Culler , Anoop Gupta , Jaswinder Pal Singh, Parallel Computer Architecture: A Hardware/Software Approach, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1997
	7	Koen Danckaert , Francky Catthoor , Hugo De Man, System level memory optimization for hardware-software co-design, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	8	L. Guthier , S. Yoo , A. Jerraya, Automatic generation and targeting of application specific operating systems and embedded systems software, Proceedings of the conference on Design, automation and test in Europe, p.679-685, March 2001, Munich, Germany
	9	J. Hennessy, M. Heinrich, A. Gupta, "Cache-Coherent Distributed Shared Memory : Perspectives on Its Development and Future Challenges", Special issue on distributed Shared-Memory Systems, March 1999.
	10	IBM, Inc. "28.4G Packet Rooting Switch", Networking Technology Data sheets, http://www.chips.ibm.com/techlib/products/commun/datashe ets.html.
	11	Ho-fung Leung , Hing-fung Ting, An Optimal Algorithm for Global Termination Detection in Shared-Memory Asynchronous Multiprocessor Systems, IEEE Transactions on Parallel and Distributed Systems, v.8 n.5, p.538-543, May 1997 [doi>10.1109/71.598280]
	12	Y. Li, W. Wolf, "Allocation of Multirate Systems on Multiprocessors with Memory Hierarchy Modeling and Optimization", Proc. of CODES/CASHE '97, Braunschweig, Germany, March, 1997.
	13	Y. Li, W. Wolf, "Hardware/Software Co-Synthesis with Memory Hierarchies", IEEE transaction on computer-aided design of integrated circuit and Systems, October 1999.
	14	Damien Lyonnard , Sungjoo Yoo , Amer Baghdadi , Ahmed A. Jerraya, Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip, Proceedings of the 38th conference on Design automation, p.518-523, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.379015]
	15	Preeti Ranjan Panda , Alexandru Nicolau , Nikil Dutt, Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration, Kluwer Academic Publishers, Norwell, MA, 1998
	16	Jelica Protic , Milo Tomasevic , Veljko Milutinovic, Distributed Shared Memory: Concepts and Systems, IEEE Parallel & Distributed Technology: Systems & Technology, v.4 n.2, p.63-79, June 1996 [doi>10.1109/88.494605]
	17	SystemC << user's manual >>, http://www.systemc.org.
	18	Sven Wuytack , Jean-Philippe Diguet , Francky V. M. Catthoor , Hugo J. De Man, Formalized methodology for data reuse exploration for low-power hierarchical memory mappings, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.6 n.4, p.529-537, Dec. 1998 [doi>10.1109/92.736124]

CITED BY 18

	Lukai Cai , Haobo Yu , Daniel Gajski, A novel memory size model for variable-mapping in system level design, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.812-817, January 27-30, 2004, Yokohama, Japan
	JoAnn M. Paul , Christopher P. Andrews , Andrew S. Cassidy , Donald E. Thomas, System-level modeling of a network switch SoC, Proceedings of the 15th international symposium on System Synthesis, October 02-04, 2002, Kyoto, Japan
	Ferid Gharsalli , Samy Meftali , Frédéric Rousseau , Ahmed A. Jerraya, Automatic generation of embedded memory wrapper for multiprocessor SoC, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	O. Ozturk , M. Kandemir , G. Chen , M. J. Irwin , M. Karakoy, Customized on-chip memories for embedded chip multiprocessors, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
	Sungchan Kim , Chaeseok Im , Soonhoi Ha, Efficient exploration of on-chip bus architectures and memory allocation, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 08-10, 2004, Stockholm, Sweden
	M. Kandemir , O. Ozturk , M. Karakoy, Dynamic on-chip memory management for chip multiprocessors, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
	Ozcan Ozturk , Mahmut Kandemir , Mary Jane Irwin, Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression, Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 19-21, 2005, Jersey City, NJ, USA
	O. Ozturk , M. Kandemir, Energy management in software-controlled multi-level memory hierarchies, Proceedings of the 15th ACM Great Lakes symposium on VLSI, April 17-19, 2005, Chicago, Illinois, USA
	Mahmut Kandemir , Guangyu Chen , Ismail Kadayif, Compiling for memory emergency, ACM SIGPLAN Notices, v.40 n.7, July 2005
	Ozcan Ozturk , Feng Wang , Mahmut Kandemir , Yuan Xie, Optimal topology exploration for application-specific 3D architectures, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
	Sudeep Pasricha , Nikil Dutt, COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
	Liping Xue , Ozcan Ozturk , Mahmut Kandemir, A memory-conscious code parallelization scheme, Proceedings of the 44th annual conference on Design automation, June 04-08, 2007, San Diego, California
	Vivy Suhendra , Chandrashekar Raghavan , Tulika Mitra, Integrated scratchpad memory optimization and task scheduling for MPSoC architectures, Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems, October 22-25, 2006, Seoul, Korea
	O. Ozturk , M. Kandemir , S. W. Son , M. Karakoy, Selective code/data migration for reducing communication energy in embedded MpSoC architectures, Proceedings of the 16th ACM Great Lakes symposium on VLSI, April 30-May 01, 2006, Philadelphia, PA, USA
	Liping Xue , Ozcan ozturk , Feihui Li , Mahmut Kandemir , I. Kolcu, Dynamic partitioning of processing and memory resources in embedded MPSoC architectures, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
	Doosan Cho , Sudeep Pasricha , Ilya Issenin , Nikil Dutt , Yunheung Paek , SunJun Ko, Compiler driven data layout optimization for regular/irregular array access patterns, ACM SIGPLAN Notices, v.43 n.7, July 2008
	Doosan Cho , Sudeep Pasricha , Ilya Issenin , Nikil D. Dutt , Minwook Ahn , Yunheung Paek, Adaptive scratch pad memory management for dynamic behavior of multimedia applications, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.28 n.4, p.554-567, April 2009
	Ozcan Ozturk , Mahmut Kandemir , Mary Jane Irwin, Using data compression for increasing memory system utilization, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.28 n.6, p.901-914, June 2009

INDEX TERMS

General Terms:
Design

Keywords:
abstraction levels, code transformation, integer linear programming, memory allocation, multiprocessor SoC, shared memory

Collaborative Colleagues:

Samy Meftali: colleagues

Ferid Gharsalli: colleagues

Frederic Rousseau: colleagues

Ahmed A. Jerraya: colleagues

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