Exploiting scratch-pad memory using Presburger formulas

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Exploiting scratch-pad memory using Presburger formulas

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International Symposium on Systems Synthesis archive
Proceedings of the 14th international symposium on Systems synthesis table of contents

Montréal, P.Q., Canada

Session: Memory optimization methodologies table of contents

Pages: 7 - 12

Year of Publication: 2001

ISBN:1-58113-418-5

Authors

Mahmut Kandemir	Pennsylvania State University, University Park, PA
Ismail Kadayif	Pennsylvania State University, University Park, PA
Ugur Sezer	University of Wisconsin, Madison, WI

Sponsors

IEEE : IEEE Computer Society Technical Committee on Design Automation
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 14, Citation Count: 7

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ABSTRACT

Effective utilization of on-chip storage space is important from both performance (execution cycles)and memory system energy consumptions perspectives. While on-chip cache memories have been widely used in the past, several factors, including lack of data access time predictability and limited effectiveness of compiler optimizations, indicate that they may not be the best candidate for portable/embedded devices. This paper presents a compiler-directed on-chip scratch-pad memory (software-managed on-chip memory) management strategy for data accesses. Our strategy is oriented towards minimizing the number of data transfers between off-chip memory and the scratch-pad memory, thereby exploiting reuse for the data residing in the scratch-pad memory. We report experimental data from our implementation showing the usefulness of our technique.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 7

	Federico Angiolini , Luca Benini , Alberto Caprara, Polynomial-time algorithm for on-chip scratchpad memory partitioning, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
	Federico Angiolini , Francesco Menichelli , Alberto Ferrero , Luca Benini , Mauro Olivieri, A post-compiler approach to scratchpad mapping of code, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
	Manish Verma , Lars Wehmeyer , Peter Marwedel, Dynamic overlay of scratchpad memory for energy minimization, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 08-10, 2004, Stockholm, Sweden
	Peter Marwedel , Lars Wehmeyer , Manish Verma , Stefan Steinke , Urs Helmig, Fast, predictable and low energy memory references through architecture-aware compilation, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.4-11, January 27-30, 2004, Yokohama, Japan
	Andhi Janapsatya , Aleksandar Ignjatović , Sri Parameswaran, A novel instruction scratchpad memory optimization method based on concomitance metric, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
	Javed Absar , Francky Catthoor, Analysis of scratch-pad and data-cache performance using statistical methods, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
	Angel Dominguez , Nghi Nguyen , Rajeev K. Barua, Recursive function data allocation to scratch-pad memory, Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, September 30-October 03, 2007, Salzburg, Austria