Estimation of power distribution in VLSI interconnects

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Estimation of power distribution in VLSI interconnects

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 2001 international symposium on Low power electronics and design table of contents

Huntington Beach, California, United States

Pages: 370 - 375

Year of Publication: 2001

ISBN:1-58113-371-5

Authors

Youngsoo Shin	Center for Collaborative Research and Institute of Industrial Science, University of Tokyo, Tokyo 153-8505, Japan
Takayasu Sakurai	Center for Collaborative Research and Institute of Industrial Science, University of Tokyo, Tokyo 153-8505, Japan

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

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ACM New York, NY, USA

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	3	L. T. Pillage and R. A. Rohrer, "Asymptotic waveform evaluation for timing analysis," IEEE Trans. on Computer-Aided Design, vol. 9, no. 4, pp. 352-366, Apr. 1990.
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