| Compiler-directed dynamic voltage/frequency scheduling for energy reduction in microprocessors |
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International Symposium on Low Power Electronics and Design
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Proceedings of the 2001 international symposium on Low power electronics and design
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Huntington Beach, California, United States
Pages: 275 - 278
Year of Publication: 2001
ISBN:1-58113-371-5
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Downloads (6 Weeks): 1, Downloads (12 Months): 22, Citation Count: 8
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Inki Hong , Darko Kirovski , Gang Qu , Miodrag Potkonjak , Mani B. Srivastava, Power optimization of variable voltage core-based systems, Proceedings of the 35th annual conference on Design automation, p.176-181, June 15-19, 1998, San Francisco, California, United States
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C.-H.Hsu,U.Krem r,and M.Hsiao. Compil r-dir cted dynamic voltage/fr quency scheduling for energy r duction in microprocessors. Technical Report DCS-TR-431,Department of Computer Science,Rutgers University,Feb.2001.
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D.Moss~,H.Aydin,B.Childers,and R.Melh m. Compil r-assist d dynamic pow r-awar scheduling for real-time applications.In Workshop on Compiler and Operating Systems for Low Power (COLP '00),Oct. 2000.
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Trevor Pering , Tom Burd , Robert Brodersen, The simulation and evaluation of dynamic voltage scaling algorithms, Proceedings of the 1998 international symposium on Low power electronics and design, p.76-81, August 10-12, 1998, Monterey, California, United States
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J.Pouwelse,K.Langendoen,and H.Sips.Voltage scaling on a low-pow r microproc ssor.In International Symposium on Mobile Multimedia Systems &Applications (MMSA '2000),Nov.2000.
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M.W iser,B.Welch,A.Demers,and S.Shenker. Scheduling for r duc d CPU nergy.In the 1st Symposium on Operating Systems Design and Implementation (OSDI-94),pages 13 -23,Nov.1994.
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CITED BY 8
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H. Saputra , M. Kandemir , N. Vijaykrishnan , M. J. Irwin , J. S. Hu , C-H. Hsu , U. Kremer, Energy-conscious compilation based on voltage scaling, ACM SIGPLAN Notices, v.37 n.7, July 2002
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Yung-Chia Lin , Yi-Ping You , Chung-Wen Huang , Jenq Kuen Lee , Wei-Kuan Shih , Ting-Ting Hwang, Energy-aware scheduling and simulation methodologies for parallel security processors with multiple voltage domains, The Journal of Supercomputing, v.42 n.2, p.201-223, November 2007
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