A profile-based energy-efficient intra-task voltage scheduling algorithm for real-time applications

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

A profile-based energy-efficient intra-task voltage scheduling algorithm for real-time applications

Full text

Pdf (83 KB)

Source

International Symposium on Low Power Electronics and Design archive
Proceedings of the 2001 international symposium on Low power electronics and design table of contents

Huntington Beach, California, United States

Pages: 271 - 274

Year of Publication: 2001

ISBN:1-58113-371-5

Authors

Dongkun Shin	School of Computer Science and Engineering, Seoul National University
Jihong Kim	School of Computer Science and Engineering, Seoul National University

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 13, Citation Count: 8

Additional Information:

references cited by index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/383082.383162 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Thomas Ball , James R. Larus, Using Paths to Measure, Explain, and Enhance Program Behavior, Computer, v.33 n.7, p.57-65, July 2000 [doi>10.1109/2.869371]
	2	I. Hong , G. Qu , M. Potkonjak , M. B. Srivastava, Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors, Proceedings of the IEEE Real-Time Systems Symposium, p.178, December 02-04, 1998
	3	Tohru Ishihara , Hiroto Yasuura, Voltage scheduling problem for dynamically variable voltage processors, Proceedings of the 1998 international symposium on Low power electronics and design, p.197-202, August 10-12, 1998, Monterey, California, United States [doi>10.1145/280756.280894]
	4	Seongsoo Lee , Takayasu Sakurai, Run-time voltage hopping for low-power real-time systems, Proceedings of the 37th conference on Design automation, p.806-809, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337785]
	5	Yann-Hang Lee , C. M. Krishna, Voltage-Clock Scaling for Low Energy Consumption in Real-Time Embedded Systems, Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications, p.272, December 13-15, 1999
	6	T. Sakurai and A. Newton. Alpha-power law MOSFET model and its application to CMOS inverter delay and other formulas. IEEE Journal of Solid State Circuits, 25(2):584-594, 1990.
	7	Dongkun Shin , Jihong Kim , Seongsoo Lee, Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications, IEEE Design & Test, v.18 n.2, p.20-30, March 2001 [doi>10.1109/54.914596]
	8	Youngsoo Shin , Kiyoung Choi, Power conscious fixed priority scheduling for hard real-time systems, Proceedings of the 36th ACM/IEEE conference on Design automation, p.134-139, June 21-25, 1999, New Orleans, Louisiana, United States [doi>10.1145/309847.309901]
	9	F. Yao , A. Demers , S. Shenker, A scheduling model for reduced CPU energy, Proceedings of the 36th Annual Symposium on Foundations of Computer Science (FOCS'95), p.374, October 23-25, 1995

CITED BY 8

	Chung-Hsing Hsu , Ulrich Kremer, The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction, ACM SIGPLAN Notices, v.38 n.5, May 2003
	Ali Manzak , Chaitali Chakrabarti, Variable voltage task scheduling algorithms for minimizing energy/power, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.2, p.270-276, April 2003
	Jaewon Seo , Taewhan Kim , Ki-Seok Chung, Profile-based optimal intra-task voltage scheduling for hard real-time applications, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
	Chaeseok Im , Soonhoi Ha , Huiseok Kim, Dynamic voltage scheduling with buffers in low-power multimedia applications, ACM Transactions on Embedded Computing Systems (TECS), v.3 n.4, p.686-705, November 2004
	Dongkun Shin , Jihong Kim, Optimizing intra-task voltage scheduling using data flow analysis, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
	G. Sudha Anil Kumar , G. Manimaran, An intra-task DVS algorithm exploiting path probabilities for real-time systems, ACM SIGBED Review, v.2 n.2, p.7-10, April 2005
	Jawad Khan , Ranga Vemuri, Energy management for battery-powered reconfigurable computing platforms, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.14 n.2, p.135-147, February 2006
	Jianli Zhuo , Chaitali Chakrabarti, Energy-efficient dynamic task scheduling algorithms for DVS systems, ACM Transactions on Embedded Computing Systems (TECS), v.7 n.2, p.1-25, February 2008