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Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2001 international symposium on Low power electronics and design table of contents
Huntington Beach, California, United States
Pages: 263 - 266  
Year of Publication: 2001
ISBN:1-58113-371-5
Authors
W. Chen  IBM T. J. Watson Research Center, Yorktown Heights, NY
W. Hwang  IBM T. J. Watson Research Center, Yorktown Heights, NY
P. Kudva  IBM T. J. Watson Research Center, Yorktown Heights, NY
G. Gristede  IBM T. J. Watson Research Center, Yorktown Heights, NY
S. Kosonocky  IBM T. J. Watson Research Center, Yorktown Heights, NY
R. Joshi  IBM T. J. Watson Research Center, Yorktown Heights, NY
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 20,   Citation Count: 3
Additional Information:

references   cited by   index terms   collaborative colleagues  

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DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/383082.383156
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Anantha P. Chandrakasan , Robert W. Brodersen, Low-Power CMOS Design, Wiley-IEEE Press, 1997
 
2
K. Roy and S.C. Prasad, "Low-Power CMOS VLSI Circuit Design", John Wiley & Sons, 2000.
 
3
J.K. Kao and A. Chandrakasan,"Dual-Threshold Voltage Techniques for Low-Power Digital Circuits", IEEE Journal of Solid State Circuits, Vol. 35, No. 7, pp. 1009-1018, July 2000.
 
4
S. Thompson et al, "Dual-Threshold Voltage and Substrate Bias - Keys to High Performance, Low Power 0:1mm Logic Designs", Symp. on VLSI Tech., pp. 69-70, June 1997.
5
Mohamed W. Allam , Mohab H. Anis , Mohamed I. Elmasry, High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies, Proceedings of the 2000 international symposium on Low power electronics and design, p.155-160, July 25-27, 2000, Rapallo, Italy  [doi>10.1145/344166.344562]

CITED BY  3
S. V. Kosonocky , A. J. Bhavnagarwala , K. Chin , G. D. Gristede , A.-M. Haen , W. Hwang , M. B. Ketchen , S. Kim , D. R. Knebel , K. W. Warren , V. Zyuban, Low-power circuits and technology for wireless digital systems, IBM Journal of Research and Development, v.47 n.2-3, p.283-298, March 2003
Frank Sill , Frank Grassert , Dirk Timmermann, Low power gate-level design with mixed-Vth (MVT) techniques, Proceedings of the 17th symposium on Integrated circuits and system design, September 07-11, 2004, Pernambuco, Brazil
Ralf Salomon , Frank Sill, High-speed, low-leakage integrated circuits: An evolutionary algorithm perspective, Journal of Systems Architecture: the EUROMICRO Journal, v.53 n.5-6, p.321-327, May, 2007

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

Additional Classification:
  C. Computer Systems Organization
  C.3 SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS
      Subjects: Signal processing systems
  C.5 COMPUTER SYSTEM IMPLEMENTATION
      C.5.3 Microcomputers
          Subjects: Microprocessors
      C.5.4 VLSI Systems


General Terms:
Design, Experimentation, Performance, Reliability

Collaborative Colleagues:
W. Chen: colleagues
W. Hwang: colleagues
P. Kudva: colleagues
G. Gristede: colleagues
S. Kosonocky: colleagues
R. Joshi: colleagues

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