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Low power pipelining of linear systems: a common operand centric approach
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2001 international symposium on Low power electronics and design table of contents
Huntington Beach, California, United States
Pages: 225 - 230  
Year of Publication: 2001
ISBN:1-58113-371-5
Authors
Daehong Kim  EECS, Seoul National University, Seoul, Korea
Dongwan Shin  ICS, UC Irvine
Kiyoung Choi  EECS, Seoul National University, Seoul, Korea
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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T. F. Lee, A. C. H. Wu, Y. L. Lin, and D. D. Gajski, "A transformation-based method for loop folding," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, pp. 439-450, April 1994.
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P. Landman and J. M. Rabaey, "Activity-sensitive architectural power analysis," IEEE Transactions On Computer-Aided Design of Integrated Circuits and Systems, vol. 15, no. 6, pp. 571-587, June 1996.
 
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Brodersen, et al, "An integrated CAD system for algorithm-specific IC design," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 10, no. 4, pp. 447-463, April 1991.
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C. E. Leiserson and J. B. Saxe. Retiming synchronous circuitry. Algorithmica, 6:5-35, 1991.


Collaborative Colleagues:
Daehong Kim: colleagues
Dongwan Shin: colleagues
Kiyoung Choi: colleagues